From patchwork Fri May 2 05:06:20 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sachin Kamat X-Patchwork-Id: 4101081 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 60869BFF02 for ; Fri, 2 May 2014 05:07:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 87AED2037D for ; Fri, 2 May 2014 05:07:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B77802037E for ; Fri, 2 May 2014 05:07:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750828AbaEBFHw (ORCPT ); Fri, 2 May 2014 01:07:52 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:61701 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751100AbaEBFHv (ORCPT ); Fri, 2 May 2014 01:07:51 -0400 Received: by mail-pa0-f45.google.com with SMTP id kq14so4830310pab.18 for ; Thu, 01 May 2014 22:07:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XiEHvEMy47DvzY1vZ+wztZh8dcDTSKqlGa9cHTZRXHg=; b=iqDZ0xDOckMITK6HLc08DnhWqUQCtulYARbKl2NG6RoNEjugXB4wzEwvY4nenQj0rY ub0D+TXD4Y+jjsc2FDRgg2rSj2K3uYfVocMcpfTayaN02fy+CXkbKxNxQKIuqjoslzuo NlihlsyOWU1Q0YuzYrQ7JWy5qIHg2GZC30oqGMqmoxgMyZiVkf1u1h/eQpQRgvdXFSGg dBfAj5ebDhioagT01b95SfUx17TVI+HzBKbrG7eB/Zg0RSGRfi8aICaQ6llBlFsLpi79 SMGh01C8xu/SWXx9MUuxythxrKtdDc+pGTioUVBDhm+FPVNGcZI3yFJ1VK1kmeG7cPyq 6hpw== X-Gm-Message-State: ALoCoQlf/80sNFnoTGK+2eeEMSEPBsa6R2qGcBHKlfYPnSP+ZUg8H9FO1VQxOZ0DcFu1NWSndzmR X-Received: by 10.66.142.233 with SMTP id rz9mr30285848pab.71.1399007269941; Thu, 01 May 2014 22:07:49 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id tu3sm172805652pab.1.2014.05.01.22.07.46 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 01 May 2014 22:07:49 -0700 (PDT) From: Sachin Kamat To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, heiko@sntech.de, arnd@arndb.de, robh+dt@kernel.org, kgene.kim@samsung.com, sachin.kamat@linaro.org Subject: [PATCH v2 2/2] Documentation: DT: Exynos: Bind SRAM though DT Date: Fri, 2 May 2014 10:36:20 +0530 Message-Id: <1399007180-20680-2-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399007180-20680-1-git-send-email-sachin.kamat@linaro.org> References: <1399007180-20680-1-git-send-email-sachin.kamat@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add SRAM binding documentation. Signed-off-by: Sachin Kamat Acked-by: Arnd Bergmann --- Changes since v1: Minor re-wording for better clarity. --- .../devicetree/bindings/arm/exynos/smp-sram.txt | 38 ++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/exynos/smp-sram.txt diff --git a/Documentation/devicetree/bindings/arm/exynos/smp-sram.txt b/Documentation/devicetree/bindings/arm/exynos/smp-sram.txt new file mode 100644 index 000000000000..c9ff2f58f9b6 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/exynos/smp-sram.txt @@ -0,0 +1,38 @@ +Samsung Exynos SRAM for SMP bringup: +------------------------------------ + +Samsung SMP-capable Exynos SoCs use part of the SRAM for the bringup +of the secondary cores. Once the core gets powered up it executes the +code that is residing at some specific location of the SRAM. + +Therefore reserved section sub-nodes have to be added to the mmio-sram +declaration. These nodes are of two types depending upon secure or +non-secure execution environment. + +Required sub-node properties: +- compatible : depending upon boot mode, should be + "samsung,exynos4210-sram" : for Secure SYSRAM + "samsung,exynos4210-sram-ns" : for Non-secure SYSRAM + +The rest of the properties should follow the generic mmio-sram discription +found in ../../misc/sram.txt + +Example: + + sram@02020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sram@0 { + compatible = "samsung,exynos4210-sram"; + reg = <0x0 0x1000>; + }; + + smp-sram@53000 { + compatible = "samsung,exynos4210-sram-ns"; + reg = <0x53000 0x1000>; + }; + };