From patchwork Fri May 9 13:00:09 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tushar Behera X-Patchwork-Id: 4143161 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9A128BFF02 for ; Fri, 9 May 2014 13:02:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C0F32201C0 for ; Fri, 9 May 2014 13:02:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E2E6A20142 for ; Fri, 9 May 2014 13:02:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751295AbaEINCi (ORCPT ); Fri, 9 May 2014 09:02:38 -0400 Received: from mail-pd0-f181.google.com ([209.85.192.181]:43774 "EHLO mail-pd0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756611AbaEINCI (ORCPT ); Fri, 9 May 2014 09:02:08 -0400 Received: by mail-pd0-f181.google.com with SMTP id w10so3679011pde.12 for ; Fri, 09 May 2014 06:02:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8/AaFi01VzNZVDwDsHanRlkB3pZxU71mn4KwHHhK1hc=; b=GSvq06ynrJiEFPCFo/ITnw3KjVFzbDKXtpxseDQ3ClWDsQ8XS/WiqazBR/LJETXUaA qagrwavCuKjlZi01Hi1GcUd0JmFr2U3rMe5HjTHbodQoNsTIb6hPod7eYkpa1Kjcp4NA YsbOR2pe63qSnypaC4zHqzMtv7ui2zi51NC1KAGCUZ3CJhFBBYmAKqAtGU/9PvI0ipF5 cU3zVgac4mdd5CaQOMgpRX7KZTigLnJkQoeghNqhSbRpbDAMXgbCCdj3Ywu59bKpmKkC 9EQpapYucOuTHCGMwm7wg0KvVdXMwkPB66inznVq26YElLjrULHyJTNpU6Joote5KKAH MonQ== X-Gm-Message-State: ALoCoQlnzOQ5nxH4JI0VWnGtf2UbfNfZaufmqRVu/PQW8fcdInZMGo1q5huRxl4+nJyn3xZGaMu5 X-Received: by 10.66.169.111 with SMTP id ad15mr16753739pac.27.1399640527603; Fri, 09 May 2014 06:02:07 -0700 (PDT) Received: from linaro.sisodomain.com ([14.140.216.146]) by mx.google.com with ESMTPSA id qq5sm7556184pbb.24.2014.05.09.06.02.03 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 09 May 2014 06:02:07 -0700 (PDT) From: Tushar Behera To: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: mturquette@linaro.org, t.figa@samsung.com, kgene.kim@samsung.com, galak@codeaurora.org, ijc+devicetree@hellion.org.uk, mark.rutland@arm.com, pawel.moll@arm.com, robh+dt@kernel.org Subject: [PATCH 3/4] clk: samsung: exynos5250: Add xclkout debug clock Date: Fri, 9 May 2014 18:30:09 +0530 Message-Id: <1399640410-30957-4-git-send-email-tushar.behera@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399640410-30957-1-git-send-email-tushar.behera@linaro.org> References: <1399640410-30957-1-git-send-email-tushar.behera@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A new clock provider has been added to configure the XCLKOUT debug clock. Added a minimal implemetation for Exynos5420 clock driver. Right now, only one valid parent clock from XCLKOUT is defined in existing clock driver. The driver will be updated later for other for other parent clocks. Signed-off-by: Tushar Behera CC: Tomasz Figa --- drivers/clk/samsung/clk-exynos5250.c | 14 ++++++++++++++ include/dt-bindings/clock/exynos5250.h | 3 +++ 2 files changed, 17 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index e7ee442..2637aea 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -225,6 +225,13 @@ PNAME(mout_audio2_p) = { "cdclk2", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", PNAME(mout_spdif_p) = { "sclk_audio0", "sclk_audio1", "sclk_audio2", "spdif_extclk" }; +PNAME(xclkout_p) = { + "dummy", "dummy", "dummy", "dummy", + "dummy", "dummy", "dummy", "dummy", + "dummy", "dummy", "dummy", "dummy", + "dummy", "dummy", "dummy", "dummy", + "fin_pll", "dummy", "dummy" }; + /* fixed rate clocks generated outside the soc */ static struct samsung_fixed_rate_clock exynos5250_fixed_rate_ext_clks[] __initdata = { FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0), @@ -236,6 +243,7 @@ static struct samsung_fixed_rate_clock exynos5250_fixed_rate_clks[] __initdata = FRATE(0, "sclk_hdmi27m", NULL, CLK_IS_ROOT, 27000000), FRATE(0, "sclk_dptxphy", NULL, CLK_IS_ROOT, 24000000), FRATE(0, "sclk_uhostphy", NULL, CLK_IS_ROOT, 48000000), + FRATE(0, "dummy", NULL, CLK_IS_ROOT, 0), }; static struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = { @@ -678,6 +686,10 @@ static struct samsung_pll_clock exynos5250_plls[nr_plls] __initdata = { VPLL_LOCK, VPLL_CON0, NULL), }; +static struct samsung_out_clock exynos5250_clkout[] __initdata = { + CLKOUT(CLK_XCLKOUT, "xclkout", xclkout_p), +}; + static struct of_device_id ext_clk_match[] __initdata = { { .compatible = "samsung,clock-xxti", .data = (void *)0, }, { }, @@ -721,6 +733,8 @@ static void __init exynos5250_clk_init(struct device_node *np) ARRAY_SIZE(exynos5250_div_clks)); samsung_clk_register_gate(exynos5250_gate_clks, ARRAY_SIZE(exynos5250_gate_clks)); + samsung_clk_register_clkout(np, + exynos5250_clkout, ARRAY_SIZE(exynos5250_clkout)); exynos5250_clk_sleep_init(); diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h index 922f2dc..7c1cd0b 100644 --- a/include/dt-bindings/clock/exynos5250.h +++ b/include/dt-bindings/clock/exynos5250.h @@ -151,6 +151,9 @@ #define CLK_MDMA0 346 #define CLK_SMMU_MDMA0 347 +/* debug clocks */ +#define CLK_XCLKOUT 896 + /* mux clocks */ #define CLK_MOUT_HDMI 1024