From patchwork Tue May 20 05:06:05 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 4207341 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CB2B7BEEAB for ; Tue, 20 May 2014 05:07:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E1B86202F0 for ; Tue, 20 May 2014 05:07:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 90E76202E5 for ; Tue, 20 May 2014 05:07:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750706AbaETFHS (ORCPT ); Tue, 20 May 2014 01:07:18 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:39927 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750703AbaETFHR (ORCPT ); Tue, 20 May 2014 01:07:17 -0400 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N5U009OFWW3JA80@mailout4.samsung.com> for linux-samsung-soc@vger.kernel.org; Tue, 20 May 2014 14:07:15 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 20.32.16580.303EA735; Tue, 20 May 2014 14:07:15 +0900 (KST) X-AuditID: cbfee691-b7f2f6d0000040c4-f0-537ae303075e Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 02.88.08203.303EA735; Tue, 20 May 2014 14:07:15 +0900 (KST) Received: from localhost.localdomain ([107.108.83.245]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N5U00CKIWV5KN50@mmp1.samsung.com>; Tue, 20 May 2014 14:07:15 +0900 (KST) From: Rahul Sharma To: dri-devel@lists.freedesktop.org Cc: linux-samsung-soc@vger.kernel.org, inki.dae@samsung.com, t.stanislaws@samsung.com, tomasz.figa@gmail.com, kgene.kim@samsung.com, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v2] drm/exynos: use regmap interface to set hdmiphy control bit in pmu Date: Tue, 20 May 2014 10:36:05 +0530 Message-id: <1400562365-7566-1-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.9.5 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsWyRsSkTpf5cVWwQd8NA4srX9+zWUy6P4HF 4vuuL+wWvQuuslnMOL+PyWLhi3iLKYsOs1rMa3/JarFq1x9GB06PnbPusnvc7z7O5NG3ZRWj x+dNcgEsUVw2Kak5mWWpRfp2CVwZ/S9/sBfcU624dO4DawPjAvkuRk4OCQETidnv5rND2GIS F+6tZ+ti5OIQEljKKHFvyXR2mKKj2/5DJRYxStw6P4sdwmlnkpj/6gcTSBWbgK7E7IPPGEFs EQFlib8TV4HZzAI3GCWmNHp3MXJwCAtESFzeIQ5isgioSlyfUAJSwSvgLvHp42lWkLCEgILE nEk2INMlBNrZJfbM+Ag2nUVAQOLb5EMsEDWyEpsOMEOcJilxcMUNlgmMggsYGVYxiqYWJBcU J6UXmeoVJ+YWl+al6yXn525iBIbu6X/PJu5gvH/A+hBjMtC4icxSosn5wNDPK4k3NDYzsjA1 MTU2Mrc0I01YSZw3/VFSkJBAemJJanZqakFqUXxRaU5q8SFGJg5OqQZG7QX7eZnmt5+wKDuh xLH1sFqY/I6YsCKbS8qJz25M3Oa2YEGSaf+EfC55s82+e+VjGtkYunTaOLgjq2vv8eltN6ja nDixdPMdvYanIctunW7my/xacio+wkL5mIBNVmuFm6Hglr7frOsKrp/Wjyj+53/k+sa7fTcv PrM1mxrLqLvecZ2/r4ESS3FGoqEWc1FxIgAE5/upcwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrLIsWRmVeSWpSXmKPExsVy+t9jAV3mx1XBBhvPq1lc+fqezWLS/Qks Ft93fWG36F1wlc1ixvl9TBYLX8RbTFl0mNViXvtLVotVu/4wOnB67Jx1l93jfvdxJo++LasY PT5vkgtgiWpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLxCdB1 y8wBukVJoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEaSFjDmNH/8gd7wT3Vikvn PrA2MC6Q72Lk5JAQMJE4uu0/G4QtJnHh3nogm4tDSGARo8St87PYIZx2Jon5r34wgVSxCehK zD74jBHEFhFQlvg7cRWYzSxwg1FiSqN3FyMHh7BAhMTlHeIgJouAqsT1CSUgFbwC7hKfPp5m BQlLCChIzJlkM4GRewEjwypG0dSC5ILipPRcQ73ixNzi0rx0veT83E2M4Mh4JrWDcWWDxSFG AQ5GJR7eA+JVwUKsiWXFlbmHGCU4mJVEeBM2A4V4UxIrq1KL8uOLSnNSiw8xJgPtnsgsJZqc D4zavJJ4Q2MTc1NjU0sTCxMzS9KElcR5D7RaBwoJpCeWpGanphakFsFsYeLglGpgXBW643Dx 3GSlpol+93cVCnStKGPblZ7owbdk/6LCpn83QqN9bPa/79T1nm2k+X/6Gp1rlUYBDbFXjq31 yKn2OjVR+qaBcf3HmKOF2nsU3Tr+yJ/KeLtrnoOOja7ZfSY2J75F+kv3BcypurnyrFnMNI3N BoqH5v9/GWTxVn6hd8CjPfk8LiX7lFiKMxINtZiLihMB/02f/NACAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos drm hdmi driver used to get dummy hdmiphy clock to control the PMU bit for hdmiphy. This bit needs to be set before setting any resolution to hdmi hardware. This was handled using dummy hdmiphy clock which is removed here. PMU is already defined as system controller for exynos SoCs. Hdmi driver is modified to control the phy enable bit inside PMU using regmap interfaces. Devicetree binding document for hdmi is also updated. Signed-off-by: Rahul Sharma --- V2: 1) Squashed hdmiphy clock cleanup patch. 2) Addressed comments related to indentation, using BIT macro while definnig bits and using IS_ERR check while verifying regmap handle. This patch is based on exynos-drm-next branch. .../devicetree/bindings/video/exynos_hdmi.txt | 2 ++ drivers/gpu/drm/exynos/exynos_hdmi.c | 27 ++++++++++++++------ drivers/gpu/drm/exynos/regs-hdmi.h | 4 +++ 3 files changed, 25 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt index 75ada04..1fd8cf9 100644 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt @@ -28,6 +28,7 @@ Required properties: "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi". - ddc: phandle to the hdmi ddc node - phy: phandle to the hdmi phy node +- samsung,syscon-phandle: phandle for system controller node for PMU. Example: @@ -38,4 +39,5 @@ Example: hpd-gpio = <&gpx3 7 1>; ddc = <&hdmi_ddc_node>; phy = <&hdmi_phy_node>; + samsung,syscon-phandle = <&pmu_system_controller>; }; diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index b03e721..f5e188f 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -38,6 +38,8 @@ #include #include #include +#include +#include #include @@ -81,7 +83,6 @@ struct hdmi_resources { struct clk *sclk_hdmi; struct clk *sclk_pixel; struct clk *sclk_hdmiphy; - struct clk *hdmiphy; struct clk *mout_hdmi; struct regulator_bulk_data *regul_bulk; int regul_count; @@ -208,6 +209,7 @@ struct hdmi_context { const struct hdmiphy_config *phy_confs; unsigned int phy_conf_count; + struct regmap *pmureg; enum hdmi_type type; }; @@ -2013,7 +2015,10 @@ static void hdmi_poweron(struct exynos_drm_display *display) if (regulator_bulk_enable(res->regul_count, res->regul_bulk)) DRM_DEBUG_KMS("failed to enable regulator bulk\n"); - clk_prepare_enable(res->hdmiphy); + /* set pmu hdmiphy control bit to enable hdmiphy */ + regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, + PMU_HDMI_PHY_ENABLE_BIT, 1); + clk_prepare_enable(res->hdmi); clk_prepare_enable(res->sclk_hdmi); @@ -2040,7 +2045,11 @@ static void hdmi_poweroff(struct exynos_drm_display *display) clk_disable_unprepare(res->sclk_hdmi); clk_disable_unprepare(res->hdmi); - clk_disable_unprepare(res->hdmiphy); + + /* reset pmu hdmiphy control bit to disable hdmiphy */ + regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL, + PMU_HDMI_PHY_ENABLE_BIT, 0); + regulator_bulk_disable(res->regul_count, res->regul_bulk); pm_runtime_put_sync(hdata->dev); @@ -2143,11 +2152,6 @@ static int hdmi_resources_init(struct hdmi_context *hdata) DRM_ERROR("failed to get clock 'sclk_hdmiphy'\n"); goto fail; } - res->hdmiphy = devm_clk_get(dev, "hdmiphy"); - if (IS_ERR(res->hdmiphy)) { - DRM_ERROR("failed to get clock 'hdmiphy'\n"); - goto fail; - } res->mout_hdmi = devm_clk_get(dev, "mout_hdmi"); if (IS_ERR(res->mout_hdmi)) { DRM_ERROR("failed to get clock 'mout_hdmi'\n"); @@ -2353,6 +2357,13 @@ static int hdmi_probe(struct platform_device *pdev) goto err_hdmiphy; } + hdata->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node, + "samsung,syscon-phandle"); + if (IS_ERR(hdata->pmureg)) { + DRM_ERROR("syscon regmap lookup failed.\n"); + goto err_hdmiphy; + } + pm_runtime_enable(dev); hdmi_display.ctx = hdata; diff --git a/drivers/gpu/drm/exynos/regs-hdmi.h b/drivers/gpu/drm/exynos/regs-hdmi.h index 84a69cd..6d846b9 100644 --- a/drivers/gpu/drm/exynos/regs-hdmi.h +++ b/drivers/gpu/drm/exynos/regs-hdmi.h @@ -585,4 +585,8 @@ #define HDMI_PHY_DISABLE_MODE_SET 0x80 #define HDMI_PHY_ENABLE_MODE_SET 0x00 +/* PMU Registers for PHY */ +#define PMU_HDMI_PHY_CONTROL 0x700 +#define PMU_HDMI_PHY_ENABLE_BIT BIT(0) + #endif /* SAMSUNG_REGS_HDMI_H */