From patchwork Thu Sep 11 10:20:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Krishna Chatradhi X-Patchwork-Id: 4884481 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B20C3C0338 for ; Thu, 11 Sep 2014 10:26:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 675572025A for ; Thu, 11 Sep 2014 10:26:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B456320260 for ; Thu, 11 Sep 2014 10:26:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754382AbaIKK0S (ORCPT ); Thu, 11 Sep 2014 06:26:18 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:61901 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754373AbaIKK0P (ORCPT ); Thu, 11 Sep 2014 06:26:15 -0400 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NBQ004TJFNPWC80@mailout2.samsung.com>; Thu, 11 Sep 2014 19:26:13 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.123]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id A0.E2.02948.5C871145; Thu, 11 Sep 2014 19:26:13 +0900 (KST) X-AuditID: cbfee68d-f79c46d000000b84-d7-541178c56575 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id CA.74.04943.5C871145; Thu, 11 Sep 2014 19:26:13 +0900 (KST) Received: from chnaveen-ubuntu.sisodomain.com ([107.108.83.161]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NBQ00IEPFMF1D80@mmp1.samsung.com>; Thu, 11 Sep 2014 19:26:13 +0900 (KST) From: Naveen Krishna Chatradhi To: linux-arm-kernel@lists.infradead.org Cc: naveenkrishna.ch@gmail.com, linux-samsung-soc@vger.kernel.org, catalin.marinas@arm.com, robh@kernel.org, devicetree@vger.kernel.org, tomasz.figa@gmail.com, kgene.kim@samsung.com Subject: [PATCH v3 5/8] arm64: dts: Add initial device tree support for EXYNOS7 Date: Thu, 11 Sep 2014 15:50:49 +0530 Message-id: <1410430852-3491-6-git-send-email-ch.naveen@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1410430852-3491-1-git-send-email-ch.naveen@samsung.com> References: <1410430852-3491-1-git-send-email-ch.naveen@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsWyRsSkWvdohWCIwerbShbvl/UwWsw/co7V onfBVTaLTY+vsVrMOL+PyWLRtv/MFv/37GC3WLXrD6MDh8eaeWsYPXbOusvusWlVJ5vH5iX1 Hn1bVjF6fN4kF8AWxWWTkpqTWZZapG+XwJUxeVULc0GPUcXes22MDYx71bsYOTkkBEwknn36 wwxhi0lcuLeerYuRi0NIYCmjxNzrqxlhit7tXMQIkVjEKHHl92Y2kISQQD+TxPn+EBCbTcBM 4uCi1ewgtoiAhsSUrsfsIA3MAjsZJb6uuswKkhAW8Jc4cOIj2FQWAVWJ1m/NYKt5BVwkXj2b B9TAAbRNQWLOJBuQMKeAq8T/v2tZIXa5SDS+nQV2nYTAKnaJt+u/MUHMEZD4NvkQC0SvrMSm A1DfSEocXHGDZQKj8AJGhlWMoqkFyQXFSelFhnrFibnFpXnpesn5uZsYgYF/+t+z3h2Mtw9Y H2IU4GBU4uGtYBEMEWJNLCuuzD3EaAq0YSKzlGhyPjC+8kriDY3NjCxMTUyNjcwtzZTEeRWl fgYLCaQnlqRmp6YWpBbFF5XmpBYfYmTi4JRqYNR4VLelwjmqWdVkerVk2FyPpnfLyhdPLyif tStrMeNOPq17TNmSvX/OyujL/n1kW/SF4U9b5PSX3tNU/7ht4fMuZ3e5mzMlvCku8uHGyUYr Aq3ecwbGZycfiN0b/1hScp+UVNeRP6sM+N51/5X+v/F4yUGR8iMMuipP/A9ntv51OGbwod5p jhJLcUaioRZzUXEiAIhLfQN3AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrHIsWRmVeSWpSXmKPExsVy+t9jAd2jFYIhBhNuS1u8X9bDaDH/yDlW i94FV9ksNj2+xmox4/w+JotF2/4zW/zfs4PdYtWuP4wOHB5r5q1h9Ng56y67x6ZVnWwem5fU e/RtWcXo8XmTXABbVAOjTUZqYkpqkUJqXnJ+SmZeuq2Sd3C8c7ypmYGhrqGlhbmSQl5ibqqt kotPgK5bZg7QQUoKZYk5pUChgMTiYiV9O0wTQkPcdC1gGiN0fUOC4HqMDNBAwhrGjMmrWpgL eowq9p5tY2xg3KvexcjJISFgIvFu5yJGCFtM4sK99WxdjFwcQgKLGCWu/N7MBpIQEuhnkjjf HwJiswmYSRxctJodxBYR0JCY0vWYHaSBWWAno8TXVZdZQRLCAv4SB058BJvKIqAq0fqtmRnE 5hVwkXj1bB5QAwfQNgWJOZNsQMKcAq4S//+uZYXY5SLR+HYW2wRG3gWMDKsYRVMLkguKk9Jz DfWKE3OLS/PS9ZLzczcxguPqmdQOxpUNFocYBTgYlXh4K1gEQ4RYE8uKK3MPMUpwMCuJ8JYW AoV4UxIrq1KL8uOLSnNSiw8xmgIdNZFZSjQ5HxjzeSXxhsYm5qbGppYmFiZmlkrivAdarQOF BNITS1KzU1MLUotg+pg4OKUaGGPnc9uxSf9ffXLCw922kpfFDMotmNtvRdksk524YL194Id3 jn07vx4oWewZOEG+YWax5+wWPe9pkSY3GI2UMzfMbt/ziPHL/TIesbbbR7Qs71j3/j3UdXpB 8GreuZwbbZo73ePLjxfu2sXyhvnJ/NSgV9FzihZIHc5KigiozXv6OnfOkgxhMyWW4oxEQy3m ouJEAOawz2DBAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add initial device tree nodes for EXYNOS7 SoC and board dts file to support Espresso board based on Exynos7 SoC. Signed-off-by: Naveen Krishna Chatradhi Cc: Rob Herring Cc: Catalin Marinas --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/exynos/exynos7-espresso.dts | 35 +++++ arch/arm64/boot/dts/exynos/exynos7.dtsi | 167 +++++++++++++++++++++++ 3 files changed, 203 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos7-espresso.dts create mode 100644 arch/arm64/boot/dts/exynos/exynos7.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index c52bdb0..a3bc18a 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_EXYNOS7) += exynos/exynos7-espresso.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts new file mode 100644 index 0000000..4f69991 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -0,0 +1,35 @@ +/* + * SAMSUNG Exynos7 Espresso board device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos7.dtsi" + +/ { + model = "Samsung Exynos7 Espresso board based on EXYNOS7"; + compatible = "samsung,exynos7-espresso", "samsung,exynos7"; + + chosen { + linux,stdout-path = &serial_2; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x0 0xC0000000>; + }; +}; + +&fin_pll { + clock-frequency = <24000000>; +}; + +&serial_2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi new file mode 100644 index 0000000..56ec5f4 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -0,0 +1,167 @@ +/* + * SAMSUNG EXYNOS7 SoC device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +/ { + compatible = "samsung,exynos7"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial_0; + serial1 = &serial_1; + serial2 = &serial_2; + serial3 = &serial_3; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x1>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x2>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + enable-method = "psci"; + reg = <0x3>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0x18000000>; + + chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + }; + + fin_pll: xxti { + compatible = "fixed-clock"; + clock-output-names = "fin_pll"; + #clock-cells = <0>; + }; + + gic: interrupt-controller@11001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x11001000 0x1000>, + <0x11002000 0x1000>, + <0x11004000 0x2000>, + <0x11006000 0x2000>; + }; + + clock_topc: clock-controller@10570000 { + compatible = "samsung,exynos7-clock-topc"; + reg = <0x10570000 0x10000>; + #clock-cells = <1>; + }; + + clock_top0: clock-controller@105d0000 { + compatible = "samsung,exynos7-clock-top0"; + reg = <0x105d0000 0xb000>; + #clock-cells = <1>; + }; + + clock_peric0: clock-controller@13610000 { + compatible = "samsung,exynos7-clock-peric0"; + reg = <0x13610000 0xd00>; + #clock-cells = <1>; + }; + + clock_peric1: clock-controller@14C80000 { + compatible = "samsung,exynos7-clock-peric1"; + reg = <0x14c80000 0xd00>; + #clock-cells = <1>; + }; + + clock_peris: clock-controller@10040000 { + compatible = "samsung,exynos7-clock-peris"; + reg = <0x10040000 0xd00>; + #clock-cells = <1>; + }; + + serial_0: serial@13630000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13630000 0x100>; + interrupts = <0 440 0>; + clocks = <&clock_peric0 PCLK_UART0>, <&clock_peric0 SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_1: serial@14c20000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c20000 0x100>; + interrupts = <0 456 0>; + clocks = <&clock_peric1 PCLK_UART1>, <&clock_peric1 SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_2: serial@14c30000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c30000 0x100>; + interrupts = <0 457 0>; + clocks = <&clock_peric1 PCLK_UART2>, <&clock_peric1 SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + serial_3: serial@14c40000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x14c40000 0x100>; + interrupts = <0 458 0>; + clocks = <&clock_peric1 PCLK_UART3>, <&clock_peric1 SCLK_UART3>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>, + <1 11 0xff01>, + <1 10 0xff01>; + }; + }; +};