From patchwork Thu Oct 9 16:38:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 5059481 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id F1AD2C11AC for ; Thu, 9 Oct 2014 16:40:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 18AB22020E for ; Thu, 9 Oct 2014 16:40:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 09E272021F for ; Thu, 9 Oct 2014 16:40:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757623AbaJIQkC (ORCPT ); Thu, 9 Oct 2014 12:40:02 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:58876 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757598AbaJIQjw (ORCPT ); Thu, 9 Oct 2014 12:39:52 -0400 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0ND600H6ERMDNZ60@mailout2.samsung.com>; Fri, 10 Oct 2014 01:39:49 +0900 (KST) X-AuditID: cbfee61a-f79c06d000004e71-4b-5436ba557787 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 87.DD.20081.55AB6345; Fri, 10 Oct 2014 01:39:49 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0ND600M6SRKZPK30@mmp2.samsung.com>; Fri, 10 Oct 2014 01:39:49 +0900 (KST) From: Lukasz Majewski To: Eduardo Valentin , Zhang Rui Cc: "linux-samsung-soc@vger.kernel.org" , linux-arm-kernel@lists.infradead.org, Linux PM list , Kukjin Kim , Bartlomiej Zolnierkiewicz , Lukasz Majewski , Amit Daniel Kachhap , Kyungmin Park , Chanwoo Choi , Lukasz Majewski Subject: [PATCH 10/21] thermal: cpu_cooling: dts: Define device tree bindings for Exynos cpu cooling functionality Date: Thu, 09 Oct 2014 18:38:46 +0200 Message-id: <1412872737-624-11-git-send-email-l.majewski@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1412872737-624-1-git-send-email-l.majewski@samsung.com> References: <1412872737-624-1-git-send-email-l.majewski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrALMWRmVeSWpSXmKPExsVy+t9jQd3QXWYhBj0fZS0aroZYbJyxntXi +pfnrBbzr1xjtehdcJXN4mzTG3aLN4+4Ld483MxosekxUPxz7xFGixnn9zFZPHnYx+bA47Fz 1l12j8V7XjJ5bF5S77Fu2ltmj74tqxg9Pm+SC2CL4rJJSc3JLEst0rdL4MrouLWCtWCnSsXD axfYGxhPSHcxcnJICJhILHv6gAnCFpO4cG89WxcjF4eQwHRGieVHlrJCOF1MEs827WEDqWIT 0JP4fPcpWIeIgLfE633TGUGKmAWuMktc3r2SFSQhLFAisfHdfrAGFgFViaU958AaeAVcJa4t +sYKsU5RovvZBLAaTqD408ermUFsIQEXiduPXrJPYORdwMiwilE0tSC5oDgpPddQrzgxt7g0 L10vOT93EyM4HJ9J7WBc2WBxiFGAg1GJh/fBP9MQIdbEsuLK3EOMEhzMSiK822eahQjxpiRW VqUW5ccXleakFh9ilOZgURLnPdBqHSgkkJ5YkpqdmlqQWgSTZeLglGpg3Hp7w/eEnqmPjknc 1rF1EVpWsmb3ziniKQHanw872zNkJk1dfq/96K2F/+2XbEwRePv/+s7ORbrbGlPPlE3NfL5C YJLGXzt2ib9CVjM3sPJ53H05JUGrgD/w9yaTLpuW/ZuXWs31mHl7Q8yVHZoCgm/KNkWckXzv HFa2cUOKRvn0Y5In2a0dnimxFGckGmoxFxUnAgCtZeNYQwIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Presented patch aims to move data necessary for correct CPU cooling device configuration from exynos_tmu_data.c to device tree. Signed-off-by: Lukasz Majewski --- arch/arm/boot/dts/exynos4210-trats.dts | 15 +++++++++++++++ arch/arm/boot/dts/exynos4210.dtsi | 5 ++++- arch/arm/boot/dts/exynos4212.dtsi | 5 ++++- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 15 +++++++++++++++ arch/arm/boot/dts/exynos4412.dtsi | 5 ++++- arch/arm/boot/dts/exynos5250.dtsi | 20 +++++++++++++++++++- 6 files changed, 61 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index b59019c..d9dd9a7 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -428,6 +428,21 @@ status = "okay"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + cooling-maps { + map0 { + /* Corresponds to 800MHz at freq_table */ + cooling-device = <&cpu0 2 2>; + }; + map1 { + /* Corresponds to 200MHz at freq_table */ + cooling-device = <&cpu0 4 4>; + }; + }; + }; + }; + camera { pinctrl-names = "default"; pinctrl-0 = <>; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 477d455..10e8915 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -45,10 +45,13 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0x900>; + cooling-min-level = <4>; + cooling-max-level = <2>; + #cooling-cells = <2>; /* min followed by max */ }; cpu@1 { diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index 484a2da..6405954 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -26,10 +26,13 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0xA00>; + cooling-min-level = <13>; + cooling-max-level = <7>; + #cooling-cells = <2>; /* min followed by max */ }; cpu@1 { diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 5d4ecc3..28e7a4c 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -379,6 +379,21 @@ vtmu-supply = <&ldo10_reg>; status = "okay"; }; + + thermal-zones { + cpu_thermal: cpu-thermal { + cooling-maps { + map0 { + /* Corresponds to 800MHz at freq_table */ + cooling-device = <&cpu0 7 7>; + }; + map1 { + /* Corresponds to 200MHz at freq_table */ + cooling-device = <&cpu0 13 13>; + }; + }; + }; + }; }; &pinctrl_1 { diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 529fd13..9ed8925 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -26,10 +26,13 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0xA00>; + cooling-min-level = <13>; + cooling-max-level = <7>; + #cooling-cells = <2>; /* min followed by max */ }; cpu@1 { diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 492e1ef..c322fb9 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -58,11 +58,14 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; clock-frequency = <1700000000>; + cooling-min-level = <15>; + cooling-max-level = <9>; + #cooling-cells = <2>; /* min followed by max */ }; cpu@1 { device_type = "cpu"; @@ -241,6 +244,21 @@ clock-names = "tmu_apbif"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + cooling-maps { + map0 { + /* Corresponds to 800MHz at freq_table */ + cooling-device = <&cpu0 9 9>; + }; + map1 { + /* Corresponds to 200MHz at freq_table */ + cooling-device = <&cpu0 15 15>; + }; + }; + }; + }; + serial@12C00000 { clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0";