From patchwork Thu Oct 9 16:38:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 5059601 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 333159F349 for ; Thu, 9 Oct 2014 16:40:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 29FB1201FE for ; Thu, 9 Oct 2014 16:40:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 11FF72020F for ; Thu, 9 Oct 2014 16:40:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751197AbaJIQkR (ORCPT ); Thu, 9 Oct 2014 12:40:17 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:8932 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752694AbaJIQkQ (ORCPT ); Thu, 9 Oct 2014 12:40:16 -0400 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0ND600HTYRN25D20@mailout1.samsung.com>; Fri, 10 Oct 2014 01:40:14 +0900 (KST) X-AuditID: cbfee61a-f79c06d000004e71-68-5436ba6e6f53 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id D2.ED.20081.E6AB6345; Fri, 10 Oct 2014 01:40:14 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0ND600M6SRKZPK30@mmp2.samsung.com>; Fri, 10 Oct 2014 01:40:14 +0900 (KST) From: Lukasz Majewski To: Eduardo Valentin , Zhang Rui Cc: "linux-samsung-soc@vger.kernel.org" , linux-arm-kernel@lists.infradead.org, Linux PM list , Kukjin Kim , Bartlomiej Zolnierkiewicz , Lukasz Majewski , Amit Daniel Kachhap , Kyungmin Park , Chanwoo Choi , Lukasz Majewski Subject: [PATCH 16/21] thermal: exynos: dts: Provide device tree bindings identical to one in exynos_tmu_data.c Date: Thu, 09 Oct 2014 18:38:52 +0200 Message-id: <1412872737-624-17-git-send-email-l.majewski@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1412872737-624-1-git-send-email-l.majewski@samsung.com> References: <1412872737-624-1-git-send-email-l.majewski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrALMWRmVeSWpSXmKPExsVy+t9jQd28XWYhBh/nqVo0XA2x2DhjPavF 9S/PWS3mX7nGatG74CqbxdmmN+wWbx5xW7x5uJnRYtNjoPjn3iOMFjPO72OyePKwj82Bx2Pn rLvsHov3vGTy2Lyk3mPdtLfMHn1bVjF6fN4kF8AWxWWTkpqTWZZapG+XwJUxs6+JteCLZUXn 8qfMDYxL9boYOTkkBEwkbk/9zARhi0lcuLeerYuRi0NIYDqjxM+5K6GcLiaJn2u7GEGq2AT0 JD7ffQrWISLgLfF633RGkCJmgavMEpd3r2QFSQgLFErcW3SWHcRmEVCVuHz6DZjNK+Aq8fz5 ImaIdYoS3c8msIHYnEDxp49Xg8WFBFwkbj96yT6BkXcBI8MqRtHUguSC4qT0XEO94sTc4tK8 dL3k/NxNjOBwfCa1g3Flg8UhRgEORiUe3gf/TEOEWBPLiitzDzFKcDArifBun2kWIsSbklhZ lVqUH19UmpNafIhRmoNFSZz3QKt1oJBAemJJanZqakFqEUyWiYNTqoHxxA3lU+HF/kFLDBas bjw95aSx7iEnw7uHF98/sC5eP6javnnz9hvdLK9llI5/179Qxv57XdasOFm1piOVXVfl2ROz HC37cxiFmuaW/AnuWvDu6Zw8E/6Tojtcp/krTdh1uXNqwPXL6VVnXew2Bm/b9HhD3T7HLXv8 kozbM9YbZLjc2vr39sTDSizFGYmGWsxFxYkAPabb1EMCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Presented device tree bindings provide data already hardcoded in the exynos_tmu_data.c file. After this commit, it should be possible to reuse common thermal core framework in Exynos SoCs. Signed-off-by: Lukasz Majewski --- arch/arm/boot/dts/exynos4.dtsi | 5 +++++ arch/arm/boot/dts/exynos4210.dtsi | 23 ++++++++++++++++++++++- arch/arm/boot/dts/exynos4x12.dtsi | 3 +++ arch/arm/boot/dts/exynos5250.dtsi | 7 +++++-- arch/arm/boot/dts/exynos5420.dtsi | 33 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5440.dtsi | 18 ++++++++++++++++++ 6 files changed, 86 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index e0278ec..1735bb3 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -21,6 +21,7 @@ #include #include +#include #include "skeleton.dtsi" / { @@ -645,4 +646,8 @@ samsung,sysreg = <&sys_reg>; status = "disabled"; }; + + tmu: tmu@100C0000 { + #include "exynos4412-tmu-sensor-conf.dtsi" + }; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 10e8915..1c52681 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -21,6 +21,8 @@ #include "exynos4.dtsi" #include "exynos4210-pinctrl.dtsi" +#include "exynos4-cpu-thermal.dtsi" +#include / { compatible = "samsung,exynos4210", "samsung,exynos4"; @@ -146,16 +148,35 @@ reg = <0x03860000 0x1000>; }; - tmu@100C0000 { + tmu: tmu@100C0000 { compatible = "samsung,exynos4210-tmu"; interrupt-parent = <&combiner>; reg = <0x100C0000 0x100>; interrupts = <2 4>; clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; + gain = <15>; + reference_voltage = <7>; + type = ; status = "disabled"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + trips { + cpu_alert0: cpu-alert-0 { + temperature = <85000>; /* millicelsius */ + }; + cpu_alert1: cpu-alert-1 { + temperature = <100000>; /* millicelsius */ + }; + cpu_alert2: cpu-alert-2 { + temperature = <110000>; /* millicelsius */ + }; + }; + }; + }; + g2d@12800000 { compatible = "samsung,s5pv210-g2d"; reg = <0x12800000 0x1000>; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index c12890c..a7dda7e 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -19,6 +19,8 @@ #include "exynos4.dtsi" #include "exynos4x12-pinctrl.dtsi" +#include "exynos4-cpu-thermal.dtsi" +#include / { aliases { @@ -279,6 +281,7 @@ interrupts = <2 4>; clocks = <&clock 383>; clock-names = "tmu_apbif"; + type = ; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index c322fb9..e71ec78 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -20,8 +20,9 @@ #include #include "exynos5.dtsi" #include "exynos5250-pinctrl.dtsi" - +#include "exynos4-cpu-thermal.dtsi" #include +#include / { compatible = "samsung,exynos5250", "samsung,exynos5"; @@ -236,12 +237,14 @@ status = "disabled"; }; - tmu@10060000 { + tmu: tmu@10060000 { compatible = "samsung,exynos5250-tmu"; reg = <0x10060000 0x100>; interrupts = <0 65 0>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; + type = ; + #include "exynos4412-tmu-sensor-conf.dtsi" }; thermal-zones { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index bfe056d..4bebc6f 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -756,6 +756,8 @@ interrupts = <0 65 0>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; + #include "exynos4412-tmu-sensor-conf.dtsi" + type = ; }; tmu_cpu1: tmu@10064000 { @@ -764,6 +766,8 @@ interrupts = <0 183 0>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; + #include "exynos4412-tmu-sensor-conf.dtsi" + type = ; }; tmu_cpu2: tmu@10068000 { @@ -772,6 +776,8 @@ interrupts = <0 184 0>; clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; + #include "exynos4412-tmu-sensor-conf.dtsi" + type = ; }; tmu_cpu3: tmu@1006c000 { @@ -780,6 +786,8 @@ interrupts = <0 185 0>; clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; + #include "exynos4412-tmu-sensor-conf.dtsi" + type = ; }; tmu_gpu: tmu@100a0000 { @@ -788,6 +796,31 @@ interrupts = <0 215 0>; clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; + #include "exynos4412-tmu-sensor-conf.dtsi" + type = ; + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0>; + #include "exynos5420-trip-points.dtsi" + }; + cpu1_thermal: cpu1-thermal { + thermal-sensors = <&tmu_cpu1>; + #include "exynos5420-trip-points.dtsi" + }; + cpu2_thermal: cpu2-thermal { + thermal-sensors = <&tmu_cpu2>; + #include "exynos5420-trip-points.dtsi" + }; + cpu3_thermal: cpu3-thermal { + thermal-sensors = <&tmu_cpu3>; + #include "exynos5420-trip-points.dtsi" + }; + gpu_thermal: gpu-thermal { + thermal-sensors = <&tmu_gpu>; + #include "exynos5420-trip-points.dtsi" + }; }; watchdog: watchdog@101D0000 { diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 8f3373c..59d9416 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -219,6 +219,7 @@ interrupts = <0 58 0>; clocks = <&clock CLK_B_125>; clock-names = "tmu_apbif"; + #include "exynos5440-tmu-sensor-conf.dtsi" }; tmuctrl_1: tmuctrl@16011C { @@ -227,6 +228,7 @@ interrupts = <0 58 0>; clocks = <&clock CLK_B_125>; clock-names = "tmu_apbif"; + #include "exynos5440-tmu-sensor-conf.dtsi" }; tmuctrl_2: tmuctrl@160120 { @@ -235,6 +237,22 @@ interrupts = <0 58 0>; clocks = <&clock CLK_B_125>; clock-names = "tmu_apbif"; + #include "exynos5440-tmu-sensor-conf.dtsi" + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmuctrl_0>; + #include "exynos5440-trip-points.dtsi" + }; + cpu1_thermal: cpu1-thermal { + thermal-sensors = <&tmuctrl_1>; + #include "exynos5440-trip-points.dtsi" + }; + cpu2_thermal: cpu2-thermal { + thermal-sensors = <&tmuctrl_2>; + #include "exynos5440-trip-points.dtsi" + }; }; sata@210000 {