From patchwork Thu Feb 5 12:35:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 5784311 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 189B9BF440 for ; Thu, 5 Feb 2015 12:36:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5360D2026F for ; Thu, 5 Feb 2015 12:36:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5FFFD201E4 for ; Thu, 5 Feb 2015 12:36:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757378AbbBEMgQ (ORCPT ); Thu, 5 Feb 2015 07:36:16 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:9051 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752314AbbBEMgP (ORCPT ); Thu, 5 Feb 2015 07:36:15 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NJA0016MTV4JL60@mailout3.w1.samsung.com>; Thu, 05 Feb 2015 12:40:16 +0000 (GMT) X-AuditID: cbfec7f5-b7fc86d0000066b7-ce-54d363292a39 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 45.58.26295.92363D45; Thu, 05 Feb 2015 12:33:45 +0000 (GMT) Received: from AMDC1061.digital.local ([106.116.147.88]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0NJA00AIBTO3X990@eusync2.samsung.com>; Thu, 05 Feb 2015 12:36:12 +0000 (GMT) From: Andrzej Hajda To: linux-samsung-soc@vger.kernel.org Cc: Andrzej Hajda , Marek Szyprowski , Kyungmin Park , Kukjin Kim , javier.martinez@collabora.co.uk, Liquid.Acid@gmx.net, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [RFC PATCH 1/3] arm/exynos: add asynchronous bridge clock bindings Date: Thu, 05 Feb 2015 13:35:37 +0100 Message-id: <1423139739-19881-2-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1423139739-19881-1-git-send-email-a.hajda@samsung.com> References: <1423139739-19881-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupgluLIzCtJLcpLzFFi42I5/e/4FV3N5MshBh3rdC1urTvHajH/CJC4 8vU9m8XR3wUW/Y9fM1ucbXrDbnF51xw2ixnn9zFZdP38yWax9shddgcuj7/Pr7N4LN60n81j 06pONo/73ceZPPq2rGL0+LxJLoAtissmJTUnsyy1SN8ugStjyuXAgpscFR+nPGdvYNzE3sXI ySEhYCKx9NNjZghbTOLCvfVsXYxcHEICSxklzi1+zATh9DFJtN3YxAZSxSagKfF3800wW0RA VeJz2wJ2kCJmgZ1MEqc+rWcCSQgLeEts2HCTBcRmASo6vvsGWJxXwFliwbUrjBDr5CROHpvM CmJzCrhIzHv6GKieA2ibs8TMUxUTGHkXMDKsYhRNLU0uKE5KzzXSK07MLS7NS9dLzs/dxAgJ va87GJceszrEKMDBqMTDe8PrcogQa2JZcWXuIUYJDmYlEd4tICHelMTKqtSi/Pii0pzU4kOM TBycUg2MGY+Fa99dnnkpdv+tD3eNfqx4KrOGISm1PdU0fP9PsR9PEiRelh2oLE9ir9jypSKp fl0YI1+Xp17yqaC0glMFZ1Jlrkne4NyyW0VapW+e4GGp1JRD5zcwuJrXmmWesGt+UCDCt57j s5rc8+Y1uW9XFcdsCo+U1JdV1I/5zRvuNE1nxkct2TtKLMUZiYZazEXFiQBw/4NYGwIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch adds bindings for clocks required by async-bridges present in the particular power domain. Signed-off-by: Andrzej Hajda --- Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index 1e09703..5da38c5 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -22,6 +22,9 @@ Optional Properties: - pclkN, clkN: Pairs of parent of input clock and input clock to the devices in this power domain. Maximum of 4 pairs (N = 0 to 3) are supported currently. + - asbN: Clocks required by asynchronous bridges (ASB) present in + the power domain. These clock should be enabled during power + domain on/off operations. - power-domains: phandle pointing to the parent power domain, for more details see Documentation/devicetree/bindings/power/power_domain.txt