From patchwork Thu Mar 12 13:37:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 5995051 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 02F199F380 for ; Thu, 12 Mar 2015 13:39:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1893F2037F for ; Thu, 12 Mar 2015 13:39:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 35CDD202FF for ; Thu, 12 Mar 2015 13:39:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932302AbbCLNjM (ORCPT ); Thu, 12 Mar 2015 09:39:12 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:29041 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754448AbbCLNhn (ORCPT ); Thu, 12 Mar 2015 09:37:43 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0NL300958Q1I5C30@mailout2.w1.samsung.com>; Thu, 12 Mar 2015 13:41:42 +0000 (GMT) X-AuditID: cbfec7f5-b7fc86d0000066b7-67-5501961083cd Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 37.90.26295.01691055; Thu, 12 Mar 2015 13:35:12 +0000 (GMT) Received: from AMDC1061.digital.local ([106.116.147.88]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0NL300DQQPUM5GB0@eusync2.samsung.com>; Thu, 12 Mar 2015 13:37:42 +0000 (GMT) From: Andrzej Hajda To: Kukjin Kim Cc: Andrzej Hajda , Marek Szyprowski , Kyungmin Park , javier.martinez@collabora.co.uk, Liquid.Acid@gmx.net, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 RESEND 1/4] arm/exynos: add asynchronous bridge clock bindings Date: Thu, 12 Mar 2015 14:37:08 +0100 Message-id: <1426167431-24470-2-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1426167431-24470-1-git-send-email-a.hajda@samsung.com> References: <1426167431-24470-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprELMWRmVeSWpSXmKPExsVy+t/xK7oC0xhDDabeZ7O4te4cq8X8I0Di ytf3bBZHfxdY9D9+zWxxtukNu8Wmx9dYLS7vmsNmMeP8PiaLrp8/2SzWHrnL7sDt8ff5dRaP xZv2s3lsWtXJ5nG/+ziTx+Yl9R59W1YxenzeJBfAHsVlk5Kak1mWWqRvl8CV8el6I1vBS86K uz0LWRoYt3F0MXJySAiYSGx/fJUVwhaTuHBvPVsXIxeHkMBSRol7uz8yQzh9TBKrL50Fq2IT 0JT4u/kmUBUHh4iAosTmBQogNcwCj5kk7k5czQJSIywQLLHn3Dd2EJtFQFXi8pdtjCA2r4Cz xM4Jb9khtslJnDw2GWwmp4CLxPXnn9hAbCGgmqu9J1gnMPIuYGRYxSiaWppcUJyUnmukV5yY W1yal66XnJ+7iRESjl93MC49ZnWIUYCDUYmHN6KPIVSINbGsuDL3EKMEB7OSCG9pO2OoEG9K YmVValF+fFFpTmrxIUYmDk6pBsa0Oe7cElf9DiXN43vyNvrT3PUJH9P3Pv/Ydu2U6ZdJc1Ui 02dqtM2MLkjpzts33YrVqyEl4E7GeR/vX20WIR8r7gjMbTPf/ML2cu/aA8YHxPd/y9lvraFd xN9bWeDOK6Aza27idPEKszNBJc1MLT+vMSqolfnklD+9vu273u+gG45/zgsePKzEUpyRaKjF XFScCAC7TF3gJQIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch adds bindings for clocks required by async-bridges present in the particular power domain. Signed-off-by: Andrzej Hajda Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas --- Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index 1e09703..5da38c5 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -22,6 +22,9 @@ Optional Properties: - pclkN, clkN: Pairs of parent of input clock and input clock to the devices in this power domain. Maximum of 4 pairs (N = 0 to 3) are supported currently. + - asbN: Clocks required by asynchronous bridges (ASB) present in + the power domain. These clock should be enabled during power + domain on/off operations. - power-domains: phandle pointing to the parent power domain, for more details see Documentation/devicetree/bindings/power/power_domain.txt