From patchwork Thu Mar 26 02:18:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaewon Kim X-Patchwork-Id: 6096331 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id BE7A5BF90F for ; Thu, 26 Mar 2015 02:18:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D97602034C for ; Thu, 26 Mar 2015 02:18:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D00BB20374 for ; Thu, 26 Mar 2015 02:18:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750809AbbCZCSt (ORCPT ); Wed, 25 Mar 2015 22:18:49 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:55564 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750819AbbCZCSs (ORCPT ); Wed, 25 Mar 2015 22:18:48 -0400 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NLS008C9RRAR350@mailout4.samsung.com>; Thu, 26 Mar 2015 11:18:46 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.112]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 1C.B1.17016.68C63155; Thu, 26 Mar 2015 11:18:46 +0900 (KST) X-AuditID: cbfee68d-f79296d000004278-b9-55136c8686d3 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 7D.39.09430.68C63155; Thu, 26 Mar 2015 11:18:46 +0900 (KST) Received: from localhost.localdomain ([10.252.83.201]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NLS007YJRR8K430@mmp1.samsung.com>; Thu, 26 Mar 2015 11:18:46 +0900 (KST) From: Jaewon Kim To: Kamil Debski , Kukjin Kim , Vivek Gautam , Kishon Vijay Abraham I Cc: Inki Dae , Chanwoo Choi , linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-usb@vger.kernel.org, Jaewon Kim Subject: [PATCH RESEND] phy: exynos5-usbdrd: Add to support for Exynos5433 SoC Date: Thu, 26 Mar 2015 11:18:43 +0900 Message-id: <1427336323-10515-1-git-send-email-jaewon02.kim@samsung.com> X-Mailer: git-send-email 1.7.9.5 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPLMWRmVeSWpSXmKPExsWyRsSkQLctRzjUYP4vLYvrX56zWrRdOchu Men+BBaLHQ1HWC1+vL7AZtH/+DWzxYWnPWwWl3fNYbOYcX4fk8WiZa3MDlwem1Z1snn0bVnF 6HH8xnYmj8+b5AJYorhsUlJzMstSi/TtErgy/vR0MRX8k6rom3yWvYFxt1gXIyeHhICJxKX9 TSwQtpjEhXvr2boYuTiEBJYySmydfp8FpujmnaUsEIlFjBLXZ22HqvrBKLH3+lJ2kCo2AW2J 7+sXs4IkRARmMkoc3vSRCcRhFrjAKNF76gobSJWwgJ/E3jVrWEFsFgFViZnXLjGB2LwCHhIT Vv0CquEA2qcgMWeSDUivhMBkdok/816wQNQLSHybfIgFokZWYtMBZojzJCUOrrjBMoFRcAEj wypG0dSC5ILipPQiQ73ixNzi0rx0veT83E2MwHA+/e9Z7w7G2wesDzEKcDAq8fB6iAiFCrEm lhVX5h5iNAXaMJFZSjQ5Hxg1eSXxhsZmRhamJqbGRuaWZkrivIpSP4OFBNITS1KzU1MLUovi i0pzUosPMTJxcEo1MOZmKgWvYzkurJx4Xd1rTsUW4/A9X1t33W75sGLxPFkfXZ0HPL43Fshd 5fi9c65Kl4JCesaEvCfBe1bnRC6P6DVI659acK8o3Tw1Y7KdzIbGCWd3hgm2qhhb/9z+5rn7 UQepMwEuUyXvpe9551L2NfuzlO7eqpcMQq8O8vz59etO70L+D68N6pRYijMSDbWYi4oTARKG PE1iAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprJIsWRmVeSWpSXmKPExsVy+t9jAd22HOFQgym7lCyuf3nOatF25SC7 xaT7E1gsdjQcYbX48foCm0X/49fMFhee9rBZXN41h81ixvl9TBaLlrUyO3B5bFrVyebRt2UV o8fxG9uZPD5vkgtgiWpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21 VXLxCdB1y8wBukhJoSwxpxQoFJBYXKykb4dpQmiIm64FTGOErm9IEFyPkQEaSFjDmPGnp4up 4J9URd/ks+wNjLvFuhg5OSQETCRu3lnKAmGLSVy4t56ti5GLQ0hgEaPE9VnboZwfjBJ7ry9l B6liE9CW+L5+MStIQkRgJqPE4U0fmUAcZoELjBK9p66wgVQJC/hJ7F2zhhXEZhFQlZh57RIT iM0r4CExYdUvoBoOoH0KEnMm2Uxg5F7AyLCKUTS1ILmgOCk910ivODG3uDQvXS85P3cTIzha nknvYFzVYHGIUYCDUYmH10NEKFSINbGsuDL3EKMEB7OSCC+rnnCoEG9KYmVValF+fFFpTmrx IUZToOUTmaVEk/OBkZxXEm9obGJmZGlkbmhhZGyuJM6rZN8WIiSQnliSmp2aWpBaBNPHxMEp 1cDY3FH0Yk3T6YtnTr8U27Bg26aWeflFH065XFpSM134vVzHzPtaUY3cEsduS3/acVuFnyN4 grX5de+ib1HnMgvflxRoCx2YFm2nu1uALeTXguhZ3o2amQ9tFKyTPvfpty/X/vEwdtNj1i1a Nyfa5vdJ27AfC2pWOPtIibfgs9ybZwfmf+U0T+JTYinOSDTUYi4qTgQAFzCg46wCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds driver data to support for Exynos5433 SoC. The Exynos5433 has one USB3.0 Host and USB3.0 DRD(Dual Role Device). Exynos5433 is simplar to Eyxnos7 but Exynos5433 have one more USB3.0 Host controller. Signed-off-by: Jaewon Kim Tested-by: Chanwoo Choi Reviewed-by: Vivek Gautam --- .../devicetree/bindings/phy/samsung-phy.txt | 3 ++- drivers/phy/phy-exynos5-usbdrd.c | 10 ++++++++++ include/linux/mfd/syscon/exynos5-pmu.h | 3 +++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 91e38cf..60c6f2a 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -128,6 +128,7 @@ Required properties: - compatible : Should be set to one of the following supported values: - "samsung,exynos5250-usbdrd-phy" - for exynos5250 SoC, - "samsung,exynos5420-usbdrd-phy" - for exynos5420 SoC. + - "samsung,exynos5433-usbdrd-phy" - for exynos5433 SoC. - "samsung,exynos7-usbdrd-phy" - for exynos7 SoC. - reg : Register offset and length of USB DRD PHY register set; - clocks: Clock IDs array as required by the controller @@ -139,7 +140,7 @@ Required properties: PHY operations, associated by phy name. It is used to determine bit values for clock settings register. For Exynos5420 this is given as 'sclk_usbphy30' in CMU. - - optional clocks: Exynos7 SoC has now following additional + - optional clocks: Exynos5433 & Exynos7 SoC has now following additional gate clocks available: - phy_pipe: for PIPE3 phy - phy_utmi: for UTMI+ phy diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c index e2a0be7..d72ef15 100644 --- a/drivers/phy/phy-exynos5-usbdrd.c +++ b/drivers/phy/phy-exynos5-usbdrd.c @@ -624,6 +624,13 @@ static const struct exynos5_usbdrd_phy_drvdata exynos5250_usbdrd_phy = { .has_common_clk_gate = true, }; +static const struct exynos5_usbdrd_phy_drvdata exynos5433_usbdrd_phy = { + .phy_cfg = phy_cfg_exynos5, + .pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL, + .pmu_offset_usbdrd1_phy = EXYNOS5433_USBHOST30_PHY_CONTROL, + .has_common_clk_gate = false, +}; + static const struct exynos5_usbdrd_phy_drvdata exynos7_usbdrd_phy = { .phy_cfg = phy_cfg_exynos5, .pmu_offset_usbdrd0_phy = EXYNOS5_USBDRD_PHY_CONTROL, @@ -638,6 +645,9 @@ static const struct of_device_id exynos5_usbdrd_phy_of_match[] = { .compatible = "samsung,exynos5420-usbdrd-phy", .data = &exynos5420_usbdrd_phy }, { + .compatible = "samsung,exynos5433-usbdrd-phy", + .data = &exynos5433_usbdrd_phy + }, { .compatible = "samsung,exynos7-usbdrd-phy", .data = &exynos7_usbdrd_phy }, diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h index 00ef24b..9352adc 100644 --- a/include/linux/mfd/syscon/exynos5-pmu.h +++ b/include/linux/mfd/syscon/exynos5-pmu.h @@ -36,6 +36,9 @@ #define EXYNOS5420_MTCADC_PHY_CONTROL (0x724) #define EXYNOS5420_DPTX_PHY_CONTROL (0x728) +/* Exynos5433 specific register definitions */ +#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728) + #define EXYNOS5_PHY_ENABLE BIT(0) #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1)