From patchwork Sun Apr 12 12:24:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 6203021 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8AFA8BF4A7 for ; Sun, 12 Apr 2015 12:26:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A45A32018E for ; Sun, 12 Apr 2015 12:26:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9E88C20270 for ; Sun, 12 Apr 2015 12:26:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752187AbbDLM0r (ORCPT ); Sun, 12 Apr 2015 08:26:47 -0400 Received: from mail-pd0-f176.google.com ([209.85.192.176]:36510 "EHLO mail-pd0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751208AbbDLMZP (ORCPT ); Sun, 12 Apr 2015 08:25:15 -0400 Received: by pdea3 with SMTP id a3so76027922pde.3; Sun, 12 Apr 2015 05:25:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XaLmNHjE26n98dnKnVxk2VsDSzcjUYOpY1IIdXeRe2Y=; b=JDMt/MZCJWsTbtRuv2v2Uj1sZcXwxDLApa8uoqs5ydsumvYzkCFXaN9XVMKTI4P06i M3lHg7q/iUOFxgkJx+B0vxgqQQ7UsjbHcftDHPs6H41c2HZe97SRHx+9dlFQ4lPcXyQ5 /BO4Ok6rii6n9FhsvluaqEuHUZ2iiRgVu2TWMRNh4eQ4XWtLRLCzO+aNRLAIMUFwU0hi SERzOs5VsvzHI9dcgd01hXeXnknLKcAFk1xu1ZSBx9G6zb3ESMXVxpndMEVyhs43xVMO q3WV1u8rLHNX+0mwLJ6974mkQgP8iX0eec0qvy+NheMHAHYufh/tYSPbEi7NyHnpFAn2 0tCw== X-Received: by 10.70.96.65 with SMTP id dq1mr17970166pdb.79.1428841514013; Sun, 12 Apr 2015 05:25:14 -0700 (PDT) Received: from localhost.localdomain ([125.130.175.98]) by mx.google.com with ESMTPSA id jc9sm4276197pbd.54.2015.04.12.05.25.10 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 12 Apr 2015 05:25:13 -0700 (PDT) From: Krzysztof Kozlowski To: Kukjin Kim , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Arnd Bergmann , Olof Johansson , Marek Szyprowski , Krzysztof Kozlowski Subject: [PATCH 2/7] ARM: dts: Use phandle notation for overriding nodes in Exynos5250 Date: Sun, 12 Apr 2015 21:24:49 +0900 Message-Id: <1428841494-20769-3-git-send-email-k.kozlowski.k@gmail.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1428841494-20769-1-git-send-email-k.kozlowski.k@gmail.com> References: <1428841494-20769-1-git-send-email-k.kozlowski.k@gmail.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The phandle notation reduces possible mistakes when overriding nodes. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5250.dtsi | 82 +++++++++++++++++++-------------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 77f656eb8e6b..4bd737ead680 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -241,13 +241,6 @@ clock-names = "mfc"; }; - rtc: rtc@101E0000 { - clocks = <&clock CLK_RTC>; - clock-names = "rtc"; - interrupt-parent = <&pmu_system_controller>; - status = "disabled"; - }; - tmu: tmu@10060000 { compatible = "samsung,exynos5250-tmu"; reg = <0x10060000 0x100>; @@ -276,26 +269,6 @@ }; }; - serial@12C00000 { - clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; - clock-names = "uart", "clk_uart_baud0"; - }; - - serial@12C10000 { - clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; - clock-names = "uart", "clk_uart_baud0"; - }; - - serial@12C20000 { - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; - clock-names = "uart", "clk_uart_baud0"; - }; - - serial@12C30000 { - clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; - clock-names = "uart", "clk_uart_baud0"; - }; - sata: sata@122F0000 { compatible = "snps,dwc-ahci"; samsung,sata-freq = <66>; @@ -778,20 +751,6 @@ #phy-cells = <0>; }; - dp: dp-controller@145B0000 { - power-domains = <&pd_disp1>; - clocks = <&clock CLK_DP>; - clock-names = "dp"; - phys = <&dp_phy>; - phy-names = "dp"; - }; - - fimd: fimd@14400000 { - power-domains = <&pd_disp1>; - clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; - clock-names = "sclk_fimd", "fimd"; - }; - adc: adc@12D10000 { compatible = "samsung,exynos-adc-v1"; reg = <0x12D10000 0x100>; @@ -812,3 +771,44 @@ clock-names = "secss"; }; }; + +&dp { + power-domains = <&pd_disp1>; + clocks = <&clock CLK_DP>; + clock-names = "dp"; + phys = <&dp_phy>; + phy-names = "dp"; +}; + +&fimd { + power-domains = <&pd_disp1>; + clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; + clock-names = "sclk_fimd", "fimd"; +}; + +&rtc { + clocks = <&clock CLK_RTC>; + clock-names = "rtc"; + interrupt-parent = <&pmu_system_controller>; + status = "disabled"; +}; + +&serial_0 { + clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_1 { + clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_2 { + clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_3 { + clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; + clock-names = "uart", "clk_uart_baud0"; +};