From patchwork Sat Aug 15 16:26:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Padovan X-Patchwork-Id: 7021011 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 36D869F44C for ; Sat, 15 Aug 2015 16:26:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 50732206BA for ; Sat, 15 Aug 2015 16:26:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6143B206D0 for ; Sat, 15 Aug 2015 16:26:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753891AbbHOQ0f (ORCPT ); Sat, 15 Aug 2015 12:26:35 -0400 Received: from mail-yk0-f193.google.com ([209.85.160.193]:32891 "EHLO mail-yk0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753216AbbHOQ0e (ORCPT ); Sat, 15 Aug 2015 12:26:34 -0400 Received: by ykek5 with SMTP id k5so3010613yke.0 for ; Sat, 15 Aug 2015 09:26:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ebQYfLU5ZsYR/ynUjZAgFW71W9kOedub9B74f9optEM=; b=iEgZnq3IdCZnlAxAUHPzk+pEsHqXQGlV7O6RYfpQBetG46aTYW+Pdcbqahk6iEttgS iEegspJPXzoR2AIaQNCjruHHe4IPpV0T1bd70ExQp+qEORRV0CgcT0/bkqyNeODPjSPY klZ2VfpPJQZam1J5tJvk9AvqeJ6d99v+icxxduxYe4YaQw5ykHP7AIRzenlMaxlEasv0 PS+NkKyWI/8c03/meUgxG0ucvNN+mYYT/ngO9ecTHImRXkvUtt6BAlJg37CB+F15IuT9 cg4xUj98gberh7mgQJw4bWKdfc6XcteUl9nF11zu22H7MPDgF/EMwR2O7qF0cmYuCzuM bVOA== X-Received: by 10.170.57.202 with SMTP id 193mr26474553ykz.118.1439655993978; Sat, 15 Aug 2015 09:26:33 -0700 (PDT) Received: from jade.localdomain ([187.64.235.140]) by smtp.gmail.com with ESMTPSA id m132sm8636775ywb.34.2015.08.15.09.26.32 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 15 Aug 2015 09:26:33 -0700 (PDT) From: Gustavo Padovan To: linux-samsung-soc@vger.kernel.org Cc: dri-devel@lists.freedesktop.org, inki.dae@samsung.com, jy0922.shim@samsung.com, tjakobi@math.uni-bielefeld.de, Gustavo Padovan Subject: [PATCH 03/11] drm/exynos: add prepare and cleanup phases for planes Date: Sat, 15 Aug 2015 13:26:12 -0300 Message-Id: <1439655980-32146-4-git-send-email-gustavo@padovan.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1439655980-32146-1-git-send-email-gustavo@padovan.org> References: <1439655980-32146-1-git-send-email-gustavo@padovan.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Gustavo Padovan .prepare_plane() and .cleanup_plane() allows to perform extra operations before and after the update of planes. For FIMD for example this will be used to enable disable the shadow protection bit. Signed-off-by: Gustavo Padovan --- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 19 +++++++++++++++++++ drivers/gpu/drm/exynos/exynos_drm_drv.h | 6 ++++++ 2 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index 5a19e16..3a89fc9 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -72,15 +72,34 @@ exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) static void exynos_crtc_atomic_begin(struct drm_crtc *crtc) { struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); + struct drm_plane *plane; if (crtc->state->event) { WARN_ON(drm_crtc_vblank_get(crtc) != 0); exynos_crtc->event = crtc->state->event; } + + drm_atomic_crtc_for_each_plane(plane, crtc) { + struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); + + if (exynos_crtc->ops->prepare_plane) + exynos_crtc->ops->prepare_plane(exynos_crtc, + exynos_plane); + } } static void exynos_crtc_atomic_flush(struct drm_crtc *crtc) { + struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); + struct drm_plane *plane; + + drm_atomic_crtc_for_each_plane(plane, crtc) { + struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); + + if (exynos_crtc->ops->cleanup_plane) + exynos_crtc->ops->cleanup_plane(exynos_crtc, + exynos_plane); + } } static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index a993aac..9f2b5c9 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -87,6 +87,8 @@ struct exynos_drm_plane { * @disable_vblank: specific driver callback for disabling vblank interrupt. * @wait_for_vblank: wait for vblank interrupt to make sure that * hardware overlay is updated. + * @prepare_plane: prepare a window to receive a update + * @cleanup_plane: mark the end of a window update * @update_plane: apply hardware specific overlay data to registers. * @disable_plane: disable hardware specific overlay. * @te_handler: trigger to transfer video image at the tearing effect @@ -107,10 +109,14 @@ struct exynos_drm_crtc_ops { int (*enable_vblank)(struct exynos_drm_crtc *crtc); void (*disable_vblank)(struct exynos_drm_crtc *crtc); void (*wait_for_vblank)(struct exynos_drm_crtc *crtc); + void (*prepare_plane)(struct exynos_drm_crtc *crtc, + struct exynos_drm_plane *plane); void (*update_plane)(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane); void (*disable_plane)(struct exynos_drm_crtc *crtc, struct exynos_drm_plane *plane); + void (*cleanup_plane)(struct exynos_drm_crtc *crtc, + struct exynos_drm_plane *plane); void (*te_handler)(struct exynos_drm_crtc *crtc); void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable); };