From patchwork Wed Dec 16 12:21:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 7861241 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7FF7DBEEE1 for ; Wed, 16 Dec 2015 12:22:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B26AA203A4 for ; Wed, 16 Dec 2015 12:22:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5D63F203A5 for ; Wed, 16 Dec 2015 12:22:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932551AbbLPMWT (ORCPT ); Wed, 16 Dec 2015 07:22:19 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:65483 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932413AbbLPMWS (ORCPT ); Wed, 16 Dec 2015 07:22:18 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NZG00HVRAD2OI80@mailout3.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 16 Dec 2015 12:22:14 +0000 (GMT) X-AuditID: cbfec7f5-f79b16d000005389-ba-56715776e713 Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 7E.6F.21385.67751765; Wed, 16 Dec 2015 12:22:14 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NZG0012YACWHH70@eusync4.samsung.com>; Wed, 16 Dec 2015 12:22:14 +0000 (GMT) From: Marek Szyprowski To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Inki Dae , Joonyoung Shim , Seung-Woo Kim , Andrzej Hajda , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Tobias Jakobi , Gustavo Padovan Subject: [PATCH v3 4/7] drm/exynos: mixer: remove all static blending setup Date: Wed, 16 Dec 2015 13:21:45 +0100 Message-id: <1450268508-15028-5-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1450268508-15028-1-git-send-email-m.szyprowski@samsung.com> References: <1450268508-15028-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOLMWRmVeSWpSXmKPExsVy+t/xa7pl4YVhBo1HBS1urTvHarFxxnpW iytf37NZ7Hywi91i0v0JLBYv7l1ksXj9wtBixvl9TBZrj9xlt5gx+SWbRdvqD6wO3B73u48z efw7xu6xc9JeJo++LasYPT5vkgtgjeKySUnNySxLLdK3S+DKuNd5hbHguEDFnP0vGRsYH/J2 MXJySAiYSBz5dZEJwhaTuHBvPVsXIxeHkMBSRokbEx8yQzhNTBKr3s5iAaliEzCU6HrbxQZi iwi4STQdnskKUsQs0Mcs0dT8ECwhLOAtseDKPWYQm0VAVWLmqlawZl4BD4mdLVvZIdbJSfx/ uQJsNaeAp8Ta4zPB4kJANQ9W72CewMi7gJFhFaNoamlyQXFSeq6RXnFibnFpXrpecn7uJkZI 8H3dwbj0mNUhRgEORiUeXo2YgjAh1sSy4srcQ4wSHMxKIrwP5QrDhHhTEiurUovy44tKc1KL DzFKc7AoifPO3PU+REggPbEkNTs1tSC1CCbLxMEp1cBYvujeN+3ugNkn5u6pbtW2+2Z19aGI SmHQ9vmZCsUb1my2qQt1jZTI9FBMuy7XYvVooc+ytjM/960Pmy/mc+f3rYjfMz+m7F51wv0R uxLHNUOryh22AZvChK6tOtp7cMHDmyqLuTtOmel1OR56nqeyOeB4haR67O9z628/utNz3DH/ Xqtbeoe6EktxRqKhFnNRcSIAWAbf9ToCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tobias Jakobi Previously blending setup was static and most of it was done in mixer_win_reset(). Signed-off-by: Tobias Jakobi --- drivers/gpu/drm/exynos/exynos_mixer.c | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index c0d128bc084b..c572e271579e 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -401,11 +401,6 @@ static void mixer_cfg_layer(struct mixer_context *ctx, unsigned int win, mixer_reg_writemask(res, MXR_LAYER_CFG, MXR_LAYER_CFG_VP_VAL(priority), MXR_LAYER_CFG_VP_MASK); - - /* control blending of graphic layer 0 */ - mixer_reg_writemask(res, MXR_GRAPHIC_CFG(0), val, - MXR_GRP_CFG_BLEND_PRE_MUL | - MXR_GRP_CFG_PIXEL_BLEND_EN); } break; } @@ -672,7 +667,6 @@ static void mixer_win_reset(struct mixer_context *ctx) { struct mixer_resources *res = &ctx->mixer_res; unsigned long flags; - u32 val; /* value stored to register */ spin_lock_irqsave(&res->reg_slock, flags); mixer_vsync_set_update(ctx, false); @@ -694,23 +688,6 @@ static void mixer_win_reset(struct mixer_context *ctx) mixer_reg_write(res, MXR_BG_COLOR1, 0x008080); mixer_reg_write(res, MXR_BG_COLOR2, 0x008080); - /* setting graphical layers */ - val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */ - val |= MXR_GRP_CFG_WIN_BLEND_EN; - val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */ - - /* Don't blend layer 0 onto the mixer background */ - mixer_reg_write(res, MXR_GRAPHIC_CFG(0), val); - - /* Blend layer 1 into layer 0 */ - val |= MXR_GRP_CFG_BLEND_PRE_MUL; - val |= MXR_GRP_CFG_PIXEL_BLEND_EN; - mixer_reg_write(res, MXR_GRAPHIC_CFG(1), val); - - /* setting video layers */ - val = MXR_GRP_CFG_ALPHA_VAL(0); - mixer_reg_write(res, MXR_VIDEO_CFG, val); - if (ctx->vp_enabled) { /* configuration of Video Processor Registers */ vp_win_reset(ctx);