From patchwork Wed Jan 27 14:44:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 8134611 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2E2369F440 for ; Wed, 27 Jan 2016 14:45:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C820B2035B for ; Wed, 27 Jan 2016 14:45:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6E28B20131 for ; Wed, 27 Jan 2016 14:45:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932957AbcA0OpC (ORCPT ); Wed, 27 Jan 2016 09:45:02 -0500 Received: from mailout3.w1.samsung.com ([210.118.77.13]:46023 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932497AbcA0OpA (ORCPT ); Wed, 27 Jan 2016 09:45:00 -0500 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O1M006H98YXNJ10@mailout3.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 27 Jan 2016 14:44:57 +0000 (GMT) X-AuditID: cbfec7f4-f79026d00000418a-50-56a8d7e97f47 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id A7.98.16778.9E7D8A65; Wed, 27 Jan 2016 14:44:57 +0000 (GMT) Received: from amdc1339.digital.local ([106.116.147.30]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O1M00IVT8YO6E70@eusync1.samsung.com>; Wed, 27 Jan 2016 14:44:57 +0000 (GMT) From: Marek Szyprowski To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Inki Dae , Daniel Vetter , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Joonyoung Shim , Seung-Woo Kim , Andrzej Hajda , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Tobias Jakobi , Gustavo Padovan , Benjamin Gaignard , vincent.abriou@st.com, fabien.dessenne@st.com Subject: [PATCH v5 5/5] drm/exynos: add support for blending properties Date: Wed, 27 Jan 2016 15:44:43 +0100 Message-id: <1453905883-6807-6-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1453905883-6807-1-git-send-email-m.szyprowski@samsung.com> References: <1453905883-6807-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsVy+t/xy7ovr68IM3g3U9Hi1rpzrBYbZ6xn tWg6dIrN4v+2icwWV76+Z7M4tm47o8XOB7vYLSbdn8Bi8eLeRRaL1y8MLWac38dksfbIXXaL GZNfslm0rf7AavH930ImizNXD7A4CHjs/baAxePOtT1sHvNOBnrc7z7O5PHvGLvHzkl7mTz6 tqxi9Hj6Yy+zx+dNcgGcUVw2Kak5mWWpRfp2CVwZ848dYC14rFTx4G1MA+Nu2S5GTg4JAROJ bVsXsEDYYhIX7q1n62Lk4hASWMoosWxPKzOE08Qk8fXWfiaQKjYBQ4mut11sILaIgJtE0+GZ rCBFzAL3WSSufj7ADpIQFnCXeNfbzwxiswioSvy6OA/I5uDgBYrPfOsMsU1O4v/LFWAzOQU8 JG7OXM8IYgsBldy7OIV1AiPvAkaGVYyiqaXJBcVJ6bmGesWJucWleel6yfm5mxghAf1lB+Pi Y1aHGAU4GJV4eG/sXx4mxJpYVlyZe4hRgoNZSYSX9dKKMCHelMTKqtSi/Pii0pzU4kOM0hws SuK8c3e9DxESSE8sSc1OTS1ILYLJMnFwSjUwKgtlKdxTW7FKpEqCrymjft02vh91ymXH3H++ /Rzpxv58Q+6xqVohrllr+p/E2PhybCxtj37/ZXJQpIwh45G0x49f/rSZ1K/hqcdZq5nwh012 1oq5vF8Tn35aXBbHwdm04bHeiyvMQtt95l8xv9HSvbGk4r+s4CInwxcdW5f8r69K6GiVefNQ iaU4I9FQi7moOBEA2B6FL2QCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for blending related properties to Exynos DRM core and Exynos Mixer CRTC device. Signed-off-by: Marek Szyprowski --- drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 +++ drivers/gpu/drm/exynos/exynos_drm_plane.c | 60 +++++++++++++++++++++++++++++++ 2 files changed, 65 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index 816537886e4e..b33d69b8bb38 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -92,6 +92,9 @@ struct exynos_drm_plane { #define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0) #define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1) #define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2) +#define EXYNOS_DRM_PLANE_CAP_PLANE_ALPHA (1 << 3) +#define EXYNOS_DRM_PLANE_CAP_PREMULT_ALPHA (1 << 4) +#define EXYNOS_DRM_PLANE_CAP_BLENDING (1 << 5) /* * Exynos DRM plane configuration structure. @@ -100,6 +103,7 @@ struct exynos_drm_plane { * @type: type of the plane (primary, cursor or overlay). * @pixel_formats: supported pixel formats. * @num_pixel_formats: number of elements in 'pixel_formats'. + * @blending_mode: default blending mode. * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*) */ @@ -108,6 +112,7 @@ struct exynos_drm_plane_config { enum drm_plane_type type; const uint32_t *pixel_formats; unsigned int num_pixel_formats; + unsigned int blending_mode; unsigned int capabilities; }; diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index 3a486939168e..28502aac135f 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -140,6 +140,9 @@ static void exynos_drm_plane_reset(struct drm_plane *plane) plane->state = &exynos_state->base; plane->state->plane = plane; plane->state->zpos = exynos_plane->config->zpos; + plane->state->alpha = 255; + plane->state->alpha_premult = 1; + plane->state->blending = exynos_plane->config->blending_mode; } } @@ -284,6 +287,53 @@ static void exynos_plane_attach_zpos_property(struct drm_plane *plane, drm_object_attach_property(&plane->base, prop, zpos); } +static void exynos_plane_attach_alpha_property(struct drm_plane *plane) +{ + struct drm_device *dev = plane->dev; + + if (!dev->mode_config.alpha_property) + if (drm_mode_create_alpha_property(dev, 255)) + return; + + drm_object_attach_property(&plane->base, + dev->mode_config.alpha_property, 255); +} + +static void exynos_plane_attach_alpha_premult_property(struct drm_plane *plane) +{ + struct drm_device *dev = plane->dev; + + if (!dev->mode_config.alpha_premult_property) + if (drm_mode_create_alpha_premult_property(dev)) { + printk("failed to create alpha premult property\n"); + return; + } + + drm_object_attach_property(&plane->base, + dev->mode_config.alpha_premult_property, 1); +} + +static void exynos_plane_attach_blending_property(struct drm_plane *plane, + unsigned int blending_mode) +{ + struct drm_device *dev = plane->dev; + static unsigned int blending_modes[] = { + DRM_BLEND_DISABLED, + DRM_BLEND_PIXEL_ALPHA, + DRM_BLEND_CONST_ALPHA, + DRM_BLEND_PIXEL_CONST_ALPHA, + }; + + if (!dev->mode_config.blending_property) + if (drm_mode_create_blending_property(dev, blending_modes, + ARRAY_SIZE(blending_modes))) + return; + + drm_object_attach_property(&plane->base, + dev->mode_config.blending_property, + blending_mode); +} + int exynos_plane_init(struct drm_device *dev, struct exynos_drm_plane *exynos_plane, unsigned int index, unsigned long possible_crtcs, @@ -310,5 +360,15 @@ int exynos_plane_init(struct drm_device *dev, exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos, !(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS)); + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PLANE_ALPHA) + exynos_plane_attach_alpha_property(&exynos_plane->base); + + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PREMULT_ALPHA) + exynos_plane_attach_alpha_premult_property(&exynos_plane->base); + + if (config->capabilities & EXYNOS_DRM_PLANE_CAP_BLENDING) + exynos_plane_attach_blending_property(&exynos_plane->base, + config->blending_mode); + return 0; }