From patchwork Mon Mar 14 02:04:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 8574751 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 87BDD9F44D for ; Mon, 14 Mar 2016 02:04:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4EA562045E for ; Mon, 14 Mar 2016 02:04:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1394C20462 for ; Mon, 14 Mar 2016 02:04:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933241AbcCNCEe (ORCPT ); Sun, 13 Mar 2016 22:04:34 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:36733 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754120AbcCNCE0 (ORCPT ); Sun, 13 Mar 2016 22:04:26 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O4000THHB3CLI90@mailout1.samsung.com>; Mon, 14 Mar 2016 11:04:24 +0900 (KST) Received: from epcpsbgm2new.samsung.com ( [172.20.52.113]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id BE.51.04964.72C16E65; Mon, 14 Mar 2016 11:04:24 +0900 (KST) X-AuditID: cbfee68f-f793a6d000001364-df-56e61c271764 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id B9.37.09068.72C16E65; Mon, 14 Mar 2016 11:04:23 +0900 (KST) Received: from chan.10.32.193.11 ([10.113.62.212]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O40004KGB3BRB50@mmp2.samsung.com>; Mon, 14 Mar 2016 11:04:23 +0900 (KST) From: Chanwoo Choi To: k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Cc: jh80.chung@samsung.com, andi.shyti@samsung.com, inki.dae@samsung.com, sw0312.kim@samsung.com, pankaj.dubey@samsung.com, cw00.choi@samsung.com, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 05/10] ARM: dts: Add exynos3250-artik5 dtsi file for ARTIK5 module Date: Mon, 14 Mar 2016 11:04:10 +0900 Message-id: <1457921056-21257-6-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1457921056-21257-1-git-send-email-cw00.choi@samsung.com> References: <1457921056-21257-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrDLMWRmVeSWpSXmKPExsWyRsSkUFdD5lmYwYq9TBbbjzxjtbj+5Tmr xfwj51gtJt2fwGJx41cbq8XrF4YW/Y9fM1tsenyN1eLyrjlsFjPO72OyWLT1C7vF4TftrBYz Jr9ks1i16w+jA5/Hzll32T02repk89i8pN6jb8sqRo/Pm+QCWKO4bFJSczLLUov07RK4Mhbf bmEtOORX8ezUF9YGxh22XYwcHBICJhKfH7B3MXICmWISF+6tZ+ti5OIQEljBKNE0/TYbRMJE 4tL/tcwQiVmMEm8P/4ZyvjBKbG+cwAxSxSagJbH/xQ2wDhGBOImJFyFsZoFZTBLz5heC2MIC IRJTu5oZQWwWAVWJlbf2gfXyCrhK9PxbC7VNTuLDnkdgJ3EKuEnsOvKKFcQWAqrZd/sEI8hi CYFz7BK/fx5nhhgkIPFt8iEWiHdkJTYdYIaYIylxcMUNlgmMwgsYGVYxiqYWJBcUJ6UXGesV J+YWl+al6yXn525iBEbK6X/P+ncw3j1gfYhRgINRiYf3x5qnYUKsiWXFlbmHGE2BNkxklhJN zgfGY15JvKGxmZGFqYmpsZG5pZmSOO9CqZ/BQgLpiSWp2ampBalF8UWlOanFhxiZODilGhjt p9x48b3mYYMw8+5Tq1NvzagR3rmg7pqfwjrNrhd+poyHa4sv3+k/O02yodd1W9eNsxMNvJ5k zcr2NXfn+8KWGnAquYtxEZv39aNe/Kfjjes2Fzz8vFNs8dsubZ0tTgt6NbtFPnh+2blj4WTH zFWOF091LmHMYnp8zkN7U6RZ441be66ceT9fiaU4I9FQi7moOBEAhNgeE48CAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFIsWRmVeSWpSXmKPExsVy+t9jQV11mWdhBvOvW1hsP/KM1eL6l+es FvOPnGO1mHR/AovFjV9trBavXxha9D9+zWyx6fE1VovLu+awWcw4v4/JYtHWL+wWh9+0s1rM mPySzWLVrj+MDnweO2fdZffYtKqTzWPzknqPvi2rGD0+b5ILYI1qYLTJSE1MSS1SSM1Lzk/J zEu3VfIOjneONzUzMNQ1tLQwV1LIS8xNtVVy8QnQdcvMATpUSaEsMacUKBSQWFyspG+HaUJo iJuuBUxjhK5vSBBcj5EBGkhYw5ix+HYLa8Ehv4pnp76wNjDusO1i5OSQEDCRuPR/LTOELSZx 4d56ti5GLg4hgVmMEm8P/2aGcL4wSmxvnABWxSagJbH/xQ02EFtEIE5i4kUIm1lgFpPEvPmF ILawQIjE1K5mRhCbRUBVYuWtfWC9vAKuEj3/1rJBbJOT+LDnETuIzSngJrHryCtWEFsIqGbf 7ROMExh5FzAyrGKUSC1ILihOSs81ykst1ytOzC0uzUvXS87P3cQIjsdn0jsYD+9yP8QowMGo xMP7Y83TMCHWxLLiytxDjBIczEoivN6Sz8KEeFMSK6tSi/Lji0pzUosPMZoCHTaRWUo0OR+Y KvJK4g2NTcyMLI3MDS2MjM2VxHkf/18XJiSQnliSmp2aWpBaBNPHxMEp1cDI8SfyC6Pf4zbH VRv3cNyeU3DgtYXMCQaXMJXkNQedj/acycxVli99q2/sevm5xva/mq0bptxqVVnx55WFDQ/r C/WSFfunB/W6v120/pCg9tklZ/9PFjHidvoVtpD1e8vxfgn3x49TfvwK81jyV0b8SuifR9o3 87dzmffOsRA3/si39rvHxQeblFiKMxINtZiLihMBmLp7Qt0CAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the support for Device Tree source for Samsung ARTIK5 module[1] based on Exynos3250 SoC. The ARTIK5 module includes the follwoing devices: - Application Processor (Samsung Exynos3250) - WiFi/BT Combo chip (Broadcom4354) - PMIC (Samsung S2MPS14) - eMMC (4GB) - DRAM LPDDR3 (512MB) - Connectors pin (60 Pins x 3 set) Also, this patch adds the ARTIK5 development board[2] dts file which includes the ARTIK5 module[1] and have the devices such as sound codec, sd card port, ethernet port, uart port and so on. [1] https://www.artik.io/hardware/artik-5 [2] http://www.digikey.com/product-search/en?FV=ffecca14 Signed-off-by: Chanwoo Choi Signed-off-by: Andi Shyti --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos3250-artik5-devel.dts | 26 +++ arch/arm/boot/dts/exynos3250-artik5.dtsi | 282 ++++++++++++++++++++++++++ 3 files changed, 309 insertions(+) create mode 100644 arch/arm/boot/dts/exynos3250-artik5-devel.dts create mode 100644 arch/arm/boot/dts/exynos3250-artik5.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a4a6d70e8b26..f2de160828e8 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_DIGICOLOR) += \ dtb-$(CONFIG_ARCH_EFM32) += \ efm32gg-dk3750.dtb dtb-$(CONFIG_ARCH_EXYNOS3) += \ + exynos3250-artik5-devel.dtb \ exynos3250-monk.dtb \ exynos3250-rinato.dtb dtb-$(CONFIG_ARCH_EXYNOS4) += \ diff --git a/arch/arm/boot/dts/exynos3250-artik5-devel.dts b/arch/arm/boot/dts/exynos3250-artik5-devel.dts new file mode 100644 index 000000000000..d17c28969118 --- /dev/null +++ b/arch/arm/boot/dts/exynos3250-artik5-devel.dts @@ -0,0 +1,26 @@ +/* + * Samsung's Exynos3250 based ARTIK5 development board device tree source + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Device tree source file for Samsung's ARTIK5 development board + * which is based on Samsung Exynos3250 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +#include "exynos3250-artik5.dtsi" + +/ { + model = "Samsung ARTIK5 development board"; + compatible = "samsung,artik5-devel", "samsung,artik5", + "samsung,exynos3250", "samsung,exynos3"; +}; + +&serial_2 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/exynos3250-artik5.dtsi b/arch/arm/boot/dts/exynos3250-artik5.dtsi new file mode 100644 index 000000000000..97d0087efb9f --- /dev/null +++ b/arch/arm/boot/dts/exynos3250-artik5.dtsi @@ -0,0 +1,282 @@ +/* + * Samsung's Exynos3250 based ARTIK5 module device tree source + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Device tree source file for Samsung's ARTIK5 module which is based on + * Samsung Exynos3250 SoC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "exynos3250.dtsi" +#include + +/ { + compatible = "samsung,artik5", "samsung,exynos3250", "samsung,exynos3"; + + + chosen { + linux,stdout = &serial_2; + }; + + memory { + reg = <0x40000000 0x1ff00000>; + }; + + firmware@0205F000 { + compatible = "samsung,secure-firmware"; + reg = <0x0205F000 0x1000>; + }; +}; + +&i2c_0 { + #address-cells = <1>; + #size-cells = <0>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <100000>; + status = "okay"; + + s2mps14_pmic@66 { + compatible = "samsung,s2mps14-pmic"; + interrupt-parent = <&gpx3>; + interrupts = <5 0>; + reg = <0x66>; + wakeup; + + s2mps14_osc: clocks { + compatible = "samsung,s2mps14-clk"; + #clock-cells = <1>; + clock-output-names = "s2mps14_ap", "unused", + "s2mps14_bt"; + }; + + regulators { + ldo1_reg: LDO1 { + /* VDD_ALIVE15x */ + regulator-name = "VLDO1_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + /* VDDQM176 ~ VDDQM185 */ + regulator-name = "VLDO2_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + /* + * VDD1_E106 ~ VDD1_E111 + * DVDD_RTC_AP, DVDD_MMC2_AP + */ + regulator-name = "VLDO3_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo4_reg: LDO4 { + /* AVDD_PLL1120 ~ AVDD_PLL11201 */ + regulator-name = "VLDO4_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo5_reg: LDO5 { + /* VDDI_PLL_ISO141 ~ VDDI_PLL_ISO142 */ + regulator-name = "VLDO5_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + /* VDD_USB, VDD10_HSIC */ + regulator-name = "VLDO6_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + /* + * VDD18P, AVDD18_TS, AVDD18_HSIC, AVDD_PLL2, + * AVDD_ADC, AVDD_ABB_0, M4S_VDD18 + */ + regulator-name = "VLDO7_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo8_reg: LDO8 { + /* AVDD33_UOTG */ + regulator-name = "VLDO8_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + ldo9_reg: LDO9 { + /* VDDQ_E86 ~ VDDQ_E105*/ + regulator-name = "VLDO_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "VLDO10_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + ldo11_reg: LDO11 { + /* VDD_MMC */ + regulator-name = "VLDO11_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + /* VDD72 ~ VDD73 */ + regulator-name = "VLDO12_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "VLDO13_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo14_reg: LDO14 { + regulator-name = "VLDO14_2.7V"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + ldo15_reg: LDO15 { + regulator-name = "VLDO_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo16_reg: LDO16 { + regulator-name = "VLDO16_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo17_reg: LDO17 { + regulator-name = "VLDO17_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo18_reg: LDO18 { + /* DVDD_MMC2_AP */ + regulator-name = "VLDO18_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo19_reg: LDO19 { + regulator-name = "VLDO19_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo20_reg: LDO20 { + regulator-name = "VLDO20_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo21_reg: LDO21 { + regulator-name = "VLDO21_1.25V"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + }; + + ldo22_reg: LDO22 { + regulator-name = "VLDO22_1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo23_reg: LDO23 { + /* Xi2c3_SDA/SCL, Xi2c7_SDA/SCL, WLAN_SDIO */ + regulator-name = "VLDO23_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo24_reg: LDO24 { + regulator-name = "VLDO24_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo25_reg: LDO25 { + regulator-name = "VLDO25_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + buck1_reg: BUCK1 { + /* VDD_MIF */ + regulator-name = "VBUCK1_1.0V"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + buck2_reg: BUCK2 { + /* VDD_CPU */ + regulator-name = "VBUCK2_1.2V"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + buck3_reg: BUCK3 { + /* VDD_G3D */ + regulator-name = "VBUCK3_1.0V"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "VBUCK4_1.95V"; + regulator-min-microvolt = <1950000>; + regulator-max-microvolt = <1950000>; + regulator-always-on; + }; + + buck5_reg: BUCK5 { + regulator-name = "VBUCK5_1.35V"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + }; + }; +}; + +&xusbxti { + clock-frequency = <24000000>; +};