From patchwork Fri Apr 8 05:00:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanwoo Choi X-Patchwork-Id: 8780711 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 27F169FBEA for ; Fri, 8 Apr 2016 05:02:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC7C1201B9 for ; Fri, 8 Apr 2016 05:02:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0F71F2027D for ; Fri, 8 Apr 2016 05:02:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757734AbcDHFCQ (ORCPT ); Fri, 8 Apr 2016 01:02:16 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:54672 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750787AbcDHFA5 (ORCPT ); Fri, 8 Apr 2016 01:00:57 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O5A010GPTXCEI40@mailout4.samsung.com>; Fri, 08 Apr 2016 14:00:48 +0900 (KST) Received: from epcpsbgm1new.samsung.com ( [172.20.52.115]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id B5.A5.04785.00B37075; Fri, 8 Apr 2016 14:00:48 +0900 (KST) X-AuditID: cbfee68e-f79d96d0000012b1-4f-57073b003b4c Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id 74.89.06682.00B37075; Fri, 8 Apr 2016 14:00:48 +0900 (KST) Received: from chan.10.32.193.11 ([10.113.62.212]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O5A008B4TXCCJ50@mmp1.samsung.com>; Fri, 08 Apr 2016 14:00:48 +0900 (KST) From: Chanwoo Choi To: myungjoo.ham@samsung.com, kyungmin.park@samsung.com, k.kozlowski@samsung.com, kgene@kernel.org, s.nawrocki@samsung.com, tomasz.figa@gmail.com Cc: rjw@rjwysocki.net, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, linux.amoon@gmail.com, m.reichl@fivetechno.de, tjakobi@math.uni-bielefeld.de, inki.dae@samsung.com, cw00.choi@samsung.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH 1/7] PM / devfreq: event: Add new Exynos NoC probe driver Date: Fri, 08 Apr 2016 14:00:40 +0900 Message-id: <1460091646-28701-2-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.0 In-reply-to: <1460091646-28701-1-git-send-email-cw00.choi@samsung.com> References: <1460091646-28701-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNIsWRmVeSWpSXmKPExsWyRsSkWJfBmj3c4PZHY4vrX56zWsw/co7V ov/NQlaLc69WMlpMuj+BxeL1C0OL/sevmS3ONr1ht9j0+BqrxeVdc9gsPvceYbSYcX4fk8W6 jbfYLW5f5rV4eeQHo8XS6xeZLG43rmCzmDB9LYvFmdOXWC1a9x5htzj8pp3Vom31B1aLVbv+ MDqIe6yZt4bRo6W5h83jcl8vk8etO/UeO2fdZfdYufwLm8emVZ1sHpuX1Hv8O8buseVqO4tH 35ZVjB6fN8kF8ERx2aSk5mSWpRbp2yVwZRz60sRWsKK84tOqw+wNjFeSuxg5OSQETCRWn53M DGGLSVy4t56ti5GLQ0hgBaPE3rdPgRIcYEUN92Mg4ksZJVrP/GWFcL4wSvy5eYYFpJtNQEti /4sbYN0iAlMZJT6famMBcZgFjjBLTN14gwmkSljAU+LGj/OMIDaLgKrE1v1LwLp5BVwl5u37 xQJxh5zEhz2P2EFsTgE3ie8TFoL1CgHVPG94A7ZaQuAEh8ThG5PYIQYJSHybfIgF4lZZiU0H oP6RlDi44gbLBEbhBYwMqxhFUwuSC4qT0ouM9IoTc4tL89L1kvNzNzEC4/j0v2d9OxhvHrA+ xCjAwajEw3vhPVu4EGtiWXFl7iFGU6ANE5mlRJPzgckiryTe0NjMyMLUxNTYyNzSTEmcN0Hq Z7CQQHpiSWp2ampBalF8UWlOavEhRiYOTqkGxjKHPaFdqe+0DuWuudm9LW9q6eaIDfPnn47O EbJ1Mn+/+vLuRc9WzDuZ1dFycLq5wtOsL42e7H9D76cbOy24L5q4pl0g3EfOQTd4/1tzFeXf U1TOVxwSs3F7+TM5fdOBGt8DWuYWvuZOZ1KuPT8RcFNXb8Wlh24CG3iYlq/fGXEqdm/Rvzmb o5VYijMSDbWYi4oTAVbZp7feAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBKsWRmVeSWpSXmKPExsVy+t9jAV0Ga/Zwg6/PtCyuf3nOajH/yDlW i/43C1ktzr1ayWgx6f4EFovXLwwt+h+/ZrY42/SG3WLT42usFpd3zWGz+Nx7hNFixvl9TBbr Nt5it7h9mdfi5ZEfjBZLr19ksrjduILNYsL0tSwWZ05fYrVo3XuE3eLwm3ZWi7bVH1gtVu36 w+gg7rFm3hpGj5bmHjaPy329TB637tR77Jx1l91j5fIvbB6bVnWyeWxeUu/x7xi7x5ar7Swe fVtWMXp83iQXwBPVwGiTkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ibaqvk 4hOg65aZA/S1kkJZYk4pUCggsbhYSd8O04TQEDddC5jGCF3fkCC4HiMDNJCwhjHj0JcmtoIV 5RWfVh1mb2C8ktzFyMEhIWAi0XA/pouRE8gUk7hwbz1bFyMXh5DAUkaJ1jN/WSGcL4wSf26e YQGpYhPQktj/4gZYlYjAVEaJz6faWEAcZoEjzBJTN95gAqkSFvCUuPHjPCOIzSKgKrF1/xKw bl4BV4l5+36xQOyTk/iw5xE7iM0p4CbxfcJCsF4hoJrnDW9YJzDyLmBkWMUokVqQXFCclJ5r mJdarlecmFtcmpeul5yfu4kRnCqeSe1gPLjL/RCjAAejEg/vhfds4UKsiWXFlbmHGCU4mJVE eB9asIcL8aYkVlalFuXHF5XmpBYfYjQFOmwis5Rocj4wjeWVxBsam5gZWRqZG1oYGZsrifM+ /r8uTEggPbEkNTs1tSC1CKaPiYNTqoGRe+GDD86OXZOyJS/UtampOz4SdT8+/VGWx80nVt5n 8qp9y6ceb5Dl1WZW+tTdESq0Jfh14Mx5XL8OFUotVmM9pVvv8Sxd8M/Pm3H/wyoYqkS0Zd++ P1WjtsLg357Fnr1TDp2rK2d+aHEv7W3xdx02xrtGRsprs25ErFC80Pd2iUTUzWVLYlqVWIoz Eg21mIuKEwH5UmuTKwMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds NoC (Network on Chip) Probe driver which provides the primitive values to get the performance data. The packets that the Network on Chip (NoC) probes detects are transported over the network infrastructure. Exynos542x bus has multiple NoC probes to provide bandwidth information about behavior of the SoC that you can use while analyzing system performance. Signed-off-by: Chanwoo Choi --- .../bindings/devfreq/event/exynos-nocp.txt | 86 +++++++ drivers/devfreq/event/Kconfig | 8 + drivers/devfreq/event/Makefile | 2 + drivers/devfreq/event/exynos-nocp.c | 247 +++++++++++++++++++++ drivers/devfreq/event/exynos-nocp.h | 78 +++++++ 5 files changed, 421 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt create mode 100644 drivers/devfreq/event/exynos-nocp.c create mode 100644 drivers/devfreq/event/exynos-nocp.h diff --git a/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt b/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt new file mode 100644 index 000000000000..03b74fed034c --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt @@ -0,0 +1,86 @@ + +* Samsung Exynos NoC (Network on Chip) Probe device + +The Samsung Exynos542x SoC has NoC (Network on Chip) Probe for NoC bus. +NoC provides the primitive values to get the performance data. The packets +that the Network on Chip (NoC) probes detects are transported over +the network infrastructure to observer units. You can configure probes to +capture packets with header or data on the data request response network, +or as traffic debug or statistic collectors. Exynos542x bus has multiple +NoC probes to provide bandwidth information about behavior of the SoC +that you can use while analyzing system performance. + +Required properties: +- compatible: Should be "samsung,exynos5420-nocp" +- reg: physical base address of each NoC Probe and length of memory mapped region. + +Optional properties: +- clock-names : the name of clock used by the NoC Probe, "nocp" +- clocks : phandles for clock specified in "clock-names" property + +Example1 : NoC Probe nodes in exynos5420.dtsi are listed below. + + nocp_mem0_0: nocp_mem0_0@10CA1000 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1000 0x200>; + status = "disabled"; + }; + + nocp_mem0_1: nocp_mem0_1@10CA1400 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1400 0x200>; + status = "disabled"; + }; + + nocp_mem0_2: nocp_mem0_2@10CA1800 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1800 0x200>; + status = "disabled"; + }; + + nocp_mem0_3: nocp_mem0_0@10CA1C00 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1C00 0x200>; + status = "disabled"; + }; + + nocp_g3d_0: nocp_g3d_0@11A51000 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x11A51000 0x200>; + status = "disabled"; + }; + + nocp_g3d_1: nocp_g3d_1@11A51400 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x11A51400 0x200>; + status = "disabled"; + }; + + +Example2 : Events of each NoC Probe node in exynos5422-odroidxu3-common.dtsi + are listed below. + + + &nocp_mem0_0 { + status = "okay"; + }; + + &nocp_mem0_1 { + status = "okay"; + }; + + &nocp_mem0_2 { + status = "okay"; + }; + + &nocp_mem0_3 { + status = "okay"; + }; + + &nocp_g3d_0 { + status = "okay"; + }; + + &nocp_g3d_1 { + status = "okay"; + }; diff --git a/drivers/devfreq/event/Kconfig b/drivers/devfreq/event/Kconfig index a11720affc31..1e8b4f469f38 100644 --- a/drivers/devfreq/event/Kconfig +++ b/drivers/devfreq/event/Kconfig @@ -13,6 +13,14 @@ menuconfig PM_DEVFREQ_EVENT if PM_DEVFREQ_EVENT +config DEVFREQ_EVENT_EXYNOS_NOCP + bool "EXYNOS NoC (Network On Chip) Probe DEVFREQ event Driver" + depends on ARCH_EXYNOS + select PM_OPP + help + This add the devfreq-event driver for Exynos SoC. It provides NoC + (Network on Chip) Probe counters to measure the bandwidth of AXI bus. + config DEVFREQ_EVENT_EXYNOS_PPMU bool "EXYNOS PPMU (Platform Performance Monitoring Unit) DEVFREQ event Driver" depends on ARCH_EXYNOS diff --git a/drivers/devfreq/event/Makefile b/drivers/devfreq/event/Makefile index be146ead79cf..3d6afd352253 100644 --- a/drivers/devfreq/event/Makefile +++ b/drivers/devfreq/event/Makefile @@ -1,2 +1,4 @@ # Exynos DEVFREQ Event Drivers + +obj-$(CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP) += exynos-nocp.o obj-$(CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU) += exynos-ppmu.o diff --git a/drivers/devfreq/event/exynos-nocp.c b/drivers/devfreq/event/exynos-nocp.c new file mode 100644 index 000000000000..b9468a6143f6 --- /dev/null +++ b/drivers/devfreq/event/exynos-nocp.c @@ -0,0 +1,247 @@ +/* + * exynos-nocp.c - EXYNOS NoC (Network On Chip) Probe support + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * Author : Chanwoo Choi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "exynos-nocp.h" + +struct exynos_nocp { + struct devfreq_event_dev *edev; + struct devfreq_event_desc desc; + + struct device *dev; + + struct regmap *regmap; + struct clk *clk; +}; + +/* + * The devfreq-event ops structure for nocp probe. + */ +static int exynos_nocp_set_event(struct devfreq_event_dev *edev) +{ + struct exynos_nocp *nocp = devfreq_event_get_drvdata(edev); + + /* Disable NoC probe */ + regmap_update_bits(nocp->regmap, NOCP_MAIN_CTL, + NOCP_MAIN_CTL_STATEN_MASK, 0); + + /* Set a statistics dump period to 0 */ + regmap_write(nocp->regmap, NOCP_STAT_PERIOD, 0x0); + + /* Set the IntEvent fields of *_SRC */ + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_0_SRC, + NOCP_CNT_SRC_INTEVENT_MASK, + NOCP_CNT_SRC_INTEVENT_BYTE_MASK); + + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_1_SRC, + NOCP_CNT_SRC_INTEVENT_MASK, + NOCP_CNT_SRC_INTEVENT_CHAIN_MASK); + + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_2_SRC, + NOCP_CNT_SRC_INTEVENT_MASK, + NOCP_CNT_SRC_INTEVENT_CYCLE_MASK); + + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_3_SRC, + NOCP_CNT_SRC_INTEVENT_MASK, + NOCP_CNT_SRC_INTEVENT_CHAIN_MASK); + + + /* Set an alarm with a max/min value of 0 to generate StatALARM */ + regmap_write(nocp->regmap, NOCP_STAT_ALARM_MIN, 0x0); + regmap_write(nocp->regmap, NOCP_STAT_ALARM_MAX, 0x0); + + /* Set AlarmMode */ + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_0_ALARM_MODE, + NOCP_CNT_ALARM_MODE_MASK, + NOCP_CNT_ALARM_MODE_MIN_MAX_MASK); + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_1_ALARM_MODE, + NOCP_CNT_ALARM_MODE_MASK, + NOCP_CNT_ALARM_MODE_MIN_MAX_MASK); + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_2_ALARM_MODE, + NOCP_CNT_ALARM_MODE_MASK, + NOCP_CNT_ALARM_MODE_MIN_MAX_MASK); + regmap_update_bits(nocp->regmap, NOCP_COUNTERS_3_ALARM_MODE, + NOCP_CNT_ALARM_MODE_MASK, + NOCP_CNT_ALARM_MODE_MIN_MAX_MASK); + + /* Enable the measurements by setting AlarmEn and StatEn */ + regmap_update_bits(nocp->regmap, NOCP_MAIN_CTL, + NOCP_MAIN_CTL_STATEN_MASK | NOCP_MAIN_CTL_ALARMEN_MASK, + NOCP_MAIN_CTL_STATEN_MASK | NOCP_MAIN_CTL_ALARMEN_MASK); + + /* Set GlobalEN */ + regmap_update_bits(nocp->regmap, NOCP_CFG_CTL, + NOCP_CFG_CTL_GLOBALEN_MASK, + NOCP_CFG_CTL_GLOBALEN_MASK); + + /* Enable NoC probe */ + regmap_update_bits(nocp->regmap, NOCP_MAIN_CTL, + NOCP_MAIN_CTL_STATEN_MASK, + NOCP_MAIN_CTL_STATEN_MASK); + + return 0; +} + +static int exynos_nocp_get_event(struct devfreq_event_dev *edev, + struct devfreq_event_data *edata) +{ + struct exynos_nocp *nocp = devfreq_event_get_drvdata(edev); + unsigned int counter[4]; + + /* Read cycle count */ + regmap_read(nocp->regmap, NOCP_COUNTERS_0_VAL, &counter[0]); + regmap_read(nocp->regmap, NOCP_COUNTERS_1_VAL, &counter[1]); + regmap_read(nocp->regmap, NOCP_COUNTERS_2_VAL, &counter[2]); + regmap_read(nocp->regmap, NOCP_COUNTERS_3_VAL, &counter[3]); + + edata->load_count = ((counter[1] << 16) | counter[0]); + edata->total_count = ((counter[3] << 16) | counter[2]); + + dev_dbg(&edev->dev, "%s (event: %ld/%ld)\n", edev->desc->name, + edata->load_count, edata->total_count); + + return 0; +} + +static const struct devfreq_event_ops exynos_nocp_ops = { + .set_event = exynos_nocp_set_event, + .get_event = exynos_nocp_get_event, +}; + +static const struct of_device_id exynos_nocp_id_match[] = { + { .compatible = "samsung,exynos5420-nocp", }, + { /* sentinel */ }, +}; + +static struct regmap_config exynos_nocp_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = NOCP_COUNTERS_3_VAL, +}; + +static int exynos_nocp_parse_dt(struct platform_device *pdev, + struct exynos_nocp *nocp) +{ + struct device *dev = nocp->dev; + struct device_node *np = dev->of_node; + struct resource *res; + void __iomem *base; + int ret = 0; + + if (!np) { + dev_err(dev, "failed to find devicetree node\n"); + return -EINVAL; + } + + nocp->clk = devm_clk_get(dev, "nocp"); + if (IS_ERR(nocp->clk)) + nocp->clk = NULL; + + /* Maps the memory mapped IO to control nocp register */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (IS_ERR(res)) + return PTR_ERR(res); + + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + exynos_nocp_regmap_config.max_register = resource_size(res) - 4; + + nocp->regmap = devm_regmap_init_mmio(dev, base, + &exynos_nocp_regmap_config); + if (IS_ERR(nocp->regmap)) { + dev_err(dev, "failed to initialize regmap\n"); + ret = PTR_ERR(nocp->regmap); + goto err; + } + + return 0; + +err: + devm_iounmap(dev, base); + + return ret; +} + +static int exynos_nocp_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct exynos_nocp *nocp; + int ret; + + nocp = devm_kzalloc(&pdev->dev, sizeof(*nocp), GFP_KERNEL); + if (!nocp) + return -ENOMEM; + + nocp->dev = &pdev->dev; + + /* Parse dt data to get resource */ + ret = exynos_nocp_parse_dt(pdev, nocp); + if (ret < 0) { + dev_err(&pdev->dev, + "failed to parse devicetree for resource\n"); + return ret; + } + + /* Add devfreq-event device to measure the bandwidth of NoC */ + nocp->desc.ops = &exynos_nocp_ops; + nocp->desc.driver_data = nocp; + nocp->desc.name = np->name; + nocp->edev = devm_devfreq_event_add_edev(&pdev->dev, &nocp->desc); + if (IS_ERR(nocp->edev)) { + ret = PTR_ERR(nocp->edev); + dev_err(&pdev->dev, + "failed to add devfreq-event device\n"); + goto err; + } + platform_set_drvdata(pdev, nocp); + + clk_prepare_enable(nocp->clk); + + pr_info("exynos-nocp: new NoC Probe device registered: %s\n", + dev_name(dev)); + + return 0; +err: + return ret; +} + +static int exynos_nocp_remove(struct platform_device *pdev) +{ + struct exynos_nocp *nocp = platform_get_drvdata(pdev); + + clk_disable_unprepare(nocp->clk); + + return 0; +} + +static struct platform_driver exynos_nocp_driver = { + .probe = exynos_nocp_probe, + .remove = exynos_nocp_remove, + .driver = { + .name = "exynos-nocp", + .of_match_table = exynos_nocp_id_match, + }, +}; +module_platform_driver(exynos_nocp_driver); + +MODULE_DESCRIPTION("Exynos NoC (Network on Chip) Probe driver"); +MODULE_AUTHOR("Chanwoo Choi "); +MODULE_LICENSE("GPL"); diff --git a/drivers/devfreq/event/exynos-nocp.h b/drivers/devfreq/event/exynos-nocp.h new file mode 100644 index 000000000000..28564db0edb8 --- /dev/null +++ b/drivers/devfreq/event/exynos-nocp.h @@ -0,0 +1,78 @@ +/* + * exynos-nocp.h - EXYNOS NoC (Network on Chip) Probe header file + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * Author : Chanwoo Choi + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __EXYNOS_NOCP_H__ +#define __EXYNOS_NOCP_H__ + +enum nocp_reg { + NOCP_ID_REVISION_ID = 0x04, + NOCP_MAIN_CTL = 0x08, + NOCP_CFG_CTL = 0x0C, + + NOCP_STAT_PERIOD = 0x24, + NOCP_STAT_GO = 0x28, + NOCP_STAT_ALARM_MIN = 0x2C, + NOCP_STAT_ALARM_MAX = 0x30, + NOCP_STAT_ALARM_STATUS = 0x34, + NOCP_STAT_ALARM_CLR = 0x38, + + NOCP_COUNTERS_0_SRC = 0x138, + NOCP_COUNTERS_0_ALARM_MODE = 0x13C, + NOCP_COUNTERS_0_VAL = 0x140, + + NOCP_COUNTERS_1_SRC = 0x14C, + NOCP_COUNTERS_1_ALARM_MODE = 0x150, + NOCP_COUNTERS_1_VAL = 0x154, + + NOCP_COUNTERS_2_SRC = 0x160, + NOCP_COUNTERS_2_ALARM_MODE = 0x164, + NOCP_COUNTERS_2_VAL = 0x168, + + NOCP_COUNTERS_3_SRC = 0x174, + NOCP_COUNTERS_3_ALARM_MODE = 0x178, + NOCP_COUNTERS_3_VAL = 0x17C, +}; + +/* NOCP_MAIN_CTL register */ +#define NOCP_MAIN_CTL_ERREN_MASK BIT(0) +#define NOCP_MAIN_CTL_TRACEEN_MASK BIT(1) +#define NOCP_MAIN_CTL_PAYLOADEN_MASK BIT(2) +#define NOCP_MAIN_CTL_STATEN_MASK BIT(3) +#define NOCP_MAIN_CTL_ALARMEN_MASK BIT(4) +#define NOCP_MAIN_CTL_STATCONDDUMP_MASK BIT(5) +#define NOCP_MAIN_CTL_INTRUSIVEMODE_MASK BIT(6) + +/* NOCP_CFG_CTL register */ +#define NOCP_CFG_CTL_GLOBALEN_MASK BIT(0) +#define NOCP_CFG_CTL_ACTIVE_MASK BIT(1) + +/* NOCP_COUNTERS_x_SRC register */ +#define NOCP_CNT_SRC_INTEVENT_SHIFT 0 +#define NOCP_CNT_SRC_INTEVENT_MASK (0x1F << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_OFF_MASK (0x0 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_CYCLE_MASK (0x1 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_IDLE_MASK (0x2 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_XFER_MASK (0x3 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_BUSY_MASK (0x4 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_WAIT_MASK (0x5 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_PKT_MASK (0x6 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_BYTE_MASK (0x8 << NOCP_CNT_SRC_INTEVENT_SHIFT) +#define NOCP_CNT_SRC_INTEVENT_CHAIN_MASK (0x10 << NOCP_CNT_SRC_INTEVENT_SHIFT) + +/* NOCP_COUNTERS_x_ALARM_MODE register */ +#define NOCP_CNT_ALARM_MODE_SHIFT 0 +#define NOCP_CNT_ALARM_MODE_MASK (0x3 << NOCP_CNT_ALARM_MODE_SHIFT) +#define NOCP_CNT_ALARM_MODE_OFF_MASK (0x0 << NOCP_CNT_ALARM_MODE_SHIFT) +#define NOCP_CNT_ALARM_MODE_MIN_MASK (0x1 << NOCP_CNT_ALARM_MODE_SHIFT) +#define NOCP_CNT_ALARM_MODE_MAX_MASK (0x2 << NOCP_CNT_ALARM_MODE_SHIFT) +#define NOCP_CNT_ALARM_MODE_MIN_MAX_MASK (0x3 << NOCP_CNT_ALARM_MODE_SHIFT) + +#endif /* __EXYNOS_NOCP_H__ */