From patchwork Tue May 3 17:52:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9007211 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1CB6D9F39D for ; Tue, 3 May 2016 17:54:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2E6F520251 for ; Tue, 3 May 2016 17:54:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2543D202EC for ; Tue, 3 May 2016 17:54:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964859AbcECRx5 (ORCPT ); Tue, 3 May 2016 13:53:57 -0400 Received: from mail.kernel.org ([198.145.29.136]:48632 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934605AbcECRxx (ORCPT ); Tue, 3 May 2016 13:53:53 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0C847202F0; Tue, 3 May 2016 17:53:47 +0000 (UTC) Received: from localhost.localdomain (89-66-181-234.dynamic.chello.pl [89.66.181.234]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A6730202EC; Tue, 3 May 2016 17:53:42 +0000 (UTC) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Sylwester Nawrocki , Tomasz Figa , Arnd Bergmann , Olof Johansson , Kevin Hilman , Chanwoo Choi , Inki Dae , Javier Martinez Canillas , Krzysztof Kozlowski Subject: [RFC PATCH 11/12] ARM: dts: exynos: Include common exynos5 in exynos5410.dtsi Date: Tue, 3 May 2016 19:52:28 +0200 Message-Id: <1462297949-13824-12-git-send-email-krzk@kernel.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1462297949-13824-1-git-send-email-krzk@kernel.org> References: <1462297949-13824-1-git-send-email-krzk@kernel.org> X-Spam-Status: No, score=-7.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The exynos5.dtsi is used for common nodes shared between Exynos5250 and Exynos542x. Since Exynos5410 is very similar to Exynos5420 it can include the common file as well to remove duplication and make everything more consistent. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5410-smdk5410.dts | 6 +- arch/arm/boot/dts/exynos5410.dtsi | 103 ++++++++++-------------------- 2 files changed, 35 insertions(+), 74 deletions(-) diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts index 0f6429e1b75c..777fcf2edd79 100644 --- a/arch/arm/boot/dts/exynos5410-smdk5410.dts +++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts @@ -102,14 +102,14 @@ }; }; -&uart0 { +&serial_0 { status = "okay"; }; -&uart1 { +&serial_1 { status = "okay"; }; -&uart2 { +&serial_2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 8de8c644f42e..c8f2e4881667 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -14,6 +14,7 @@ */ #include "skeleton.dtsi" +#include "exynos5.dtsi" #include "exynos-syscon-restart.dtsi" #include @@ -26,9 +27,6 @@ pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; pinctrl3 = &pinctrl_3; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; }; cpus { @@ -70,49 +68,6 @@ #size-cells = <1>; ranges; - combiner: interrupt-controller@10440000 { - compatible = "samsung,exynos4210-combiner"; - #interrupt-cells = <2>; - interrupt-controller; - samsung,combiner-nr = <32>; - reg = <0x10440000 0x1000>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; - }; - - gic: interrupt-controller@10481000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x10481000 0x1000>, - <0x10482000 0x1000>, - <0x10484000 0x2000>, - <0x10486000 0x2000>; - interrupts = <1 9 0xf04>; - }; - - chipid@10000000 { - compatible = "samsung,exynos4210-chipid"; - reg = <0x10000000 0x100>; - }; - - sromc: memory-controller@12250000 { - compatible = "samsung,exynos4210-srom"; - reg = <0x12250000 0x14>; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x04000000 0x20000 - 1 0 0x05000000 0x20000 - 2 0 0x06000000 0x20000 - 3 0 0x07000000 0x20000>; - }; - pmu_system_controller: system-controller@10040000 { compatible = "samsung,exynos5410-pmu", "syscon"; reg = <0x10040000 0x5000>; @@ -236,34 +191,40 @@ reg = <0x03860000 0x1000>; interrupts = <0 47 0>; }; + }; +}; - uart0: serial@12C00000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C00000 0x100>; - interrupts = <0 51 0>; - clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; - clock-names = "uart", "clk_uart_baud0"; - status = "disabled"; - }; +&pwm { + clocks = <&clock CLK_PWM>; + clock-names = "timers"; +}; - uart1: serial@12C10000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C10000 0x100>; - interrupts = <0 52 0>; - clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; - clock-names = "uart", "clk_uart_baud0"; - status = "disabled"; - }; +&serial_0 { + clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; +}; - uart2: serial@12C20000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C20000 0x100>; - interrupts = <0 53 0>; - clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; - clock-names = "uart", "clk_uart_baud0"; - status = "disabled"; - }; - }; +&serial_1 { + clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_2 { + clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; +}; + +&serial_3 { + status = "disabled"; +}; + +&sromc { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x04000000 0x20000 + 1 0 0x05000000 0x20000 + 2 0 0x06000000 0x20000 + 3 0 0x07000000 0x20000>; }; #include "exynos5410-pinctrl.dtsi"