From patchwork Tue May 24 13:19:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 9133539 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0E3D3607D8 for ; Tue, 24 May 2016 13:21:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 01B5428236 for ; Tue, 24 May 2016 13:21:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EA5CB28258; Tue, 24 May 2016 13:21:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1B27A28236 for ; Tue, 24 May 2016 13:21:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755297AbcEXNUo (ORCPT ); Tue, 24 May 2016 09:20:44 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:44050 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755276AbcEXNUm (ORCPT ); Tue, 24 May 2016 09:20:42 -0400 Received: from epcpsbgm1new.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O7O035JQNQC1T40@mailout3.samsung.com>; Tue, 24 May 2016 22:20:39 +0900 (KST) X-AuditID: cbfee61a-f79656d000001a01-73-574455275627 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1new.samsung.com (EPCPMTA) with SMTP id D2.2B.06657.72554475; Tue, 24 May 2016 22:20:39 +0900 (KST) Received: from AMDC1976.DIGITAL.local ([106.120.53.102]) by mmp2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O7O008BCNPW8A50@mmp2.samsung.com>; Tue, 24 May 2016 22:20:39 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Sylwester Nawrocki , Tomasz Figa Cc: Michael Turquette , Stephen Boyd , Kukjin Kim , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com Subject: [PATCH 1/3] clk: samsung: exynos5433: prepare for adding CPU clocks Date: Tue, 24 May 2016 15:19:15 +0200 Message-id: <1464095957-25851-2-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1464095957-25851-1-git-send-email-b.zolnierkie@samsung.com> References: <1464095957-25851-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrELMWRmVeSWpSXmKPExsVy+t9jQV31UJdwg28zlSw2zljPavH6haFF /+PXzBabHl9jtfjYc4/V4vKuOWwWM87vY7K4eMrV4vCbdlaLH2e6WSxW7frD6MDt8f5GK7vH 5b5eJo+ds+6ye2xa1cnmsXlJvUffllWMHp83yQWwR3HZpKTmZJalFunbJXBlzOt6z1ywRq9i 0dy5jA2M/9S6GDk5JARMJJY3TWWFsMUkLtxbz9bFyMUhJDCLUaJ52TqwhJDAL0aJNbPcQWw2 ASuJie2rGEFsEYEwiY/tk5hBGpgFTjBJ/Dx9ixkkISzgI7H87mewIhYBVYknR/eCxXkFPCQ2 3P3EBLFNTuLksclgCzgFPCWWH9zFArHMQ+L0rP8sExh5FzAyrGKUSC1ILihOSs81zEst1ytO zC0uzUvXS87P3cQIDslnUjsYD+5yP8QowMGoxMMbkO8cLsSaWFZcmXuIUYKDWUmEtyDYJVyI NyWxsiq1KD++qDQntfgQozQHi5I47+P/68KEBNITS1KzU1MLUotgskwcnFINjOfVXmyLdrNP P5kSIOTyaf8CHr2M1jrHNInQEoPZEyy21qrvcf7Ov+RNrXXI593vt4boR26W3p7l9imez11r 2fGvBvNfpTWXxX7Numr1ulB3/pL7bnfsOiqVrliET56m/ELTJuPH9EvfXRx8VvqJBLxna7un 27/Yw/PKdo7cy5YnKkPXx8h+UmIpzkg01GIuKk4EAJYRXPNFAgAA Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Open-code samsung_cmu_register_one() calls for CMU_APOLLO and CMU_ATLAS setup code as a preparation for adding CPU clocks support for Exynos5433. There should be no functional change resulting from this patch. Cc: Kukjin Kim CC: Krzysztof Kozlowski Signed-off-by: Bartlomiej Zolnierkiewicz --- drivers/clk/samsung/clk-exynos5433.c | 85 +++++++++++++++++++++++------------- drivers/clk/samsung/clk.c | 12 ++--- drivers/clk/samsung/clk.h | 4 ++ 3 files changed, 65 insertions(+), 36 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 128527b..6dd81ed 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -11,6 +11,7 @@ #include #include +#include #include @@ -3594,23 +3595,35 @@ static struct samsung_gate_clock apollo_gate_clks[] __initdata = { CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), }; -static struct samsung_cmu_info apollo_cmu_info __initdata = { - .pll_clks = apollo_pll_clks, - .nr_pll_clks = ARRAY_SIZE(apollo_pll_clks), - .mux_clks = apollo_mux_clks, - .nr_mux_clks = ARRAY_SIZE(apollo_mux_clks), - .div_clks = apollo_div_clks, - .nr_div_clks = ARRAY_SIZE(apollo_div_clks), - .gate_clks = apollo_gate_clks, - .nr_gate_clks = ARRAY_SIZE(apollo_gate_clks), - .nr_clk_ids = APOLLO_NR_CLK, - .clk_regs = apollo_clk_regs, - .nr_clk_regs = ARRAY_SIZE(apollo_clk_regs), -}; - static void __init exynos5433_cmu_apollo_init(struct device_node *np) { - samsung_cmu_register_one(np, &apollo_cmu_info); + void __iomem *reg_base; + struct samsung_clk_provider *ctx; + + reg_base = of_iomap(np, 0); + if (!reg_base) { + panic("%s: failed to map registers\n", __func__); + return; + } + + ctx = samsung_clk_init(np, reg_base, APOLLO_NR_CLK); + if (!ctx) { + panic("%s: unable to allocate ctx\n", __func__); + return; + } + + samsung_clk_register_pll(ctx, apollo_pll_clks, + ARRAY_SIZE(apollo_pll_clks), reg_base); + samsung_clk_register_mux(ctx, apollo_mux_clks, + ARRAY_SIZE(apollo_mux_clks)); + samsung_clk_register_div(ctx, apollo_div_clks, + ARRAY_SIZE(apollo_div_clks)); + samsung_clk_register_gate(ctx, apollo_gate_clks, + ARRAY_SIZE(apollo_gate_clks)); + samsung_clk_sleep_init(reg_base, apollo_clk_regs, + ARRAY_SIZE(apollo_clk_regs)); + + samsung_clk_of_add_provider(np, ctx); } CLK_OF_DECLARE(exynos5433_cmu_apollo, "samsung,exynos5433-cmu-apollo", exynos5433_cmu_apollo_init); @@ -3806,23 +3819,35 @@ static struct samsung_gate_clock atlas_gate_clks[] __initdata = { CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), }; -static struct samsung_cmu_info atlas_cmu_info __initdata = { - .pll_clks = atlas_pll_clks, - .nr_pll_clks = ARRAY_SIZE(atlas_pll_clks), - .mux_clks = atlas_mux_clks, - .nr_mux_clks = ARRAY_SIZE(atlas_mux_clks), - .div_clks = atlas_div_clks, - .nr_div_clks = ARRAY_SIZE(atlas_div_clks), - .gate_clks = atlas_gate_clks, - .nr_gate_clks = ARRAY_SIZE(atlas_gate_clks), - .nr_clk_ids = ATLAS_NR_CLK, - .clk_regs = atlas_clk_regs, - .nr_clk_regs = ARRAY_SIZE(atlas_clk_regs), -}; - static void __init exynos5433_cmu_atlas_init(struct device_node *np) { - samsung_cmu_register_one(np, &atlas_cmu_info); + void __iomem *reg_base; + struct samsung_clk_provider *ctx; + + reg_base = of_iomap(np, 0); + if (!reg_base) { + panic("%s: failed to map registers\n", __func__); + return; + } + + ctx = samsung_clk_init(np, reg_base, ATLAS_NR_CLK); + if (!ctx) { + panic("%s: unable to allocate ctx\n", __func__); + return; + } + + samsung_clk_register_pll(ctx, atlas_pll_clks, + ARRAY_SIZE(atlas_pll_clks), reg_base); + samsung_clk_register_mux(ctx, atlas_mux_clks, + ARRAY_SIZE(atlas_mux_clks)); + samsung_clk_register_div(ctx, atlas_div_clks, + ARRAY_SIZE(atlas_div_clks)); + samsung_clk_register_gate(ctx, atlas_gate_clks, + ARRAY_SIZE(atlas_gate_clks)); + samsung_clk_sleep_init(reg_base, atlas_clk_regs, + ARRAY_SIZE(atlas_clk_regs)); + + samsung_clk_of_add_provider(np, ctx); } CLK_OF_DECLARE(exynos5433_cmu_atlas, "samsung,exynos5433-cmu-atlas", exynos5433_cmu_atlas_init); diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index f38a6c4..f20a15c 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -346,9 +346,9 @@ static struct syscore_ops samsung_clk_syscore_ops = { .resume = samsung_clk_resume, }; -static void samsung_clk_sleep_init(void __iomem *reg_base, - const unsigned long *rdump, - unsigned long nr_rdump) +void samsung_clk_sleep_init(void __iomem *reg_base, + const unsigned long *rdump, + unsigned long nr_rdump) { struct samsung_clock_reg_cache *reg_cache; @@ -370,9 +370,9 @@ static void samsung_clk_sleep_init(void __iomem *reg_base, } #else -static void samsung_clk_sleep_init(void __iomem *reg_base, - const unsigned long *rdump, - unsigned long nr_rdump) {} +void samsung_clk_sleep_init(void __iomem *reg_base, + const unsigned long *rdump, + unsigned long nr_rdump) {} #endif /* diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index aa872d2..ab2b101 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -399,6 +399,10 @@ extern struct samsung_clk_provider __init *samsung_cmu_register_one( extern unsigned long _get_rate(const char *clk_name); +extern void samsung_clk_sleep_init(void __iomem *reg_base, + const unsigned long *rdump, + unsigned long nr_rdump); + extern void samsung_clk_save(void __iomem *base, struct samsung_clk_reg_dump *rd, unsigned int num_regs);