From patchwork Wed Jun 1 08:34:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 9146729 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8F53060777 for ; Wed, 1 Jun 2016 09:00:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3636626538 for ; Wed, 1 Jun 2016 09:00:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 29F8B26A9A; Wed, 1 Jun 2016 09:00:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0A0B1269CB for ; Wed, 1 Jun 2016 09:00:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757796AbcFAI6m (ORCPT ); Wed, 1 Jun 2016 04:58:42 -0400 Received: from mail-wm0-f50.google.com ([74.125.82.50]:36673 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757298AbcFAIfj (ORCPT ); Wed, 1 Jun 2016 04:35:39 -0400 Received: by mail-wm0-f50.google.com with SMTP id n184so19435035wmn.1 for ; Wed, 01 Jun 2016 01:35:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=e8+uKRU32ITgMTGcebY3hgJeB84f/WwVbgFNH+kvOxU=; b=ebCImKzLr0UsC5m65m8LsuHYnWvJ4p9SbS0HV9W7asqjSufSzlhFx63zhqKO14makz S9a+lNU2g6t83KIdu/SDhe0R1AvnFlFFUkG5PA2gLkwosE6Vvn3cexDDbyhzYAZGJVBy +iNixl4wZzESXCKtw9rLonMv32lcaOjiiIRCg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=e8+uKRU32ITgMTGcebY3hgJeB84f/WwVbgFNH+kvOxU=; b=irCAoe9NersjQ+xge6zXV6nBtoKfGe7bqaxiCdRavbep54AiGuPzA010oP6cqNCVpf zDNsfZSOX10QpB5L2GDPqEiGFtXjWoUDm5iD/gkTmzn9S06HSH8CiJsZZmu2lPtaoUbT e8bsi++jlwYYXoT8x4gWqdqhJG/n2yInFNL9HiZeJTO2hQdOAmCoKLqPBOCxa49+iryN TWdp8tmVZqUNVgEA73yfz6tMjhYA1FtBoNl19rI0PEmeFpV0zg0JpE4r0+cwLpntkv2V 14iGdHgWE33H7Z3Kci+98hZB23v/KFgNmtJtOATzys0YpvzI31ztepfhGm6sjmzHXMFh kFMw== X-Gm-Message-State: ALyK8tJ305LYtEZZwIslDf8nccKFj826CXVkGlIPvc+H/FyvWcpTJTw57Z3ildyO4zo0uRCM X-Received: by 10.194.11.1 with SMTP id m1mr2484376wjb.23.1464770138138; Wed, 01 Jun 2016 01:35:38 -0700 (PDT) Received: from localhost.localdomain (sju31-1-78-210-255-2.fbx.proxad.net. [78.210.255.2]) by smtp.gmail.com with ESMTPSA id t3sm33542865wmf.20.2016.06.01.01.35.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Jun 2016 01:35:37 -0700 (PDT) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Kukjin Kim , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org (moderated list:ARM/SAMSUNG EXYNO...), linux-samsung-soc@vger.kernel.org (moderated list:ARM/SAMSUNG EXYNO...) Subject: [PATCH 5/9] clocksource/drivers/exynos_mct: Convert init function to return error Date: Wed, 1 Jun 2016 10:34:48 +0200 Message-Id: <1464770093-12667-6-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464770093-12667-1-git-send-email-daniel.lezcano@linaro.org> References: <1464770093-12667-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano Reviewed-by: Krzysztof Kozlowski --- drivers/clocksource/exynos_mct.c | 36 ++++++++++++++++++++++++------------ 1 file changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index be09bc0..f6caed0 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -232,7 +232,7 @@ static cycles_t exynos4_read_current_timer(void) return exynos4_read_count_32(); } -static void __init exynos4_clocksource_init(void) +static int __init exynos4_clocksource_init(void) { exynos4_mct_frc_start(); @@ -244,6 +244,8 @@ static void __init exynos4_clocksource_init(void) panic("%s: can't register clocksource\n", mct_frc.name); sched_clock_register(exynos4_read_sched_clock, 32, clk_rate); + + return 0; } static void exynos4_mct_comp0_stop(void) @@ -335,12 +337,14 @@ static struct irqaction mct_comp_event_irq = { .dev_id = &mct_comp_device, }; -static void exynos4_clockevent_init(void) +static int exynos4_clockevent_init(void) { mct_comp_device.cpumask = cpumask_of(0); clockevents_config_and_register(&mct_comp_device, clk_rate, 0xf, 0xffffffff); setup_irq(mct_irqs[MCT_G0_IRQ], &mct_comp_event_irq); + + return 0; } static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick); @@ -516,7 +520,7 @@ static struct notifier_block exynos4_mct_cpu_nb = { .notifier_call = exynos4_mct_cpu_notify, }; -static void __init exynos4_timer_resources(struct device_node *np, void __iomem *base) +static int __init exynos4_timer_resources(struct device_node *np, void __iomem *base) { int err, cpu; struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick); @@ -572,15 +576,17 @@ static void __init exynos4_timer_resources(struct device_node *np, void __iomem /* Immediately configure the timer on the boot CPU */ exynos4_local_timer_setup(mevt); - return; + return 0; out_irq: free_percpu_irq(mct_irqs[MCT_L0_IRQ], &percpu_mct_tick); + return err; } -static void __init mct_init_dt(struct device_node *np, unsigned int int_type) +static int __init mct_init_dt(struct device_node *np, unsigned int int_type) { u32 nr_irqs, i; + int ret; mct_int_type = int_type; @@ -600,20 +606,26 @@ static void __init mct_init_dt(struct device_node *np, unsigned int int_type) for (i = MCT_L0_IRQ; i < nr_irqs; i++) mct_irqs[i] = irq_of_parse_and_map(np, i); - exynos4_timer_resources(np, of_iomap(np, 0)); - exynos4_clocksource_init(); - exynos4_clockevent_init(); + ret = exynos4_timer_resources(np, of_iomap(np, 0)); + if (ret) + return ret; + + ret = exynos4_clocksource_init(); + if (ret) + return ret; + + return exynos4_clockevent_init(); } -static void __init mct_init_spi(struct device_node *np) +static int __init mct_init_spi(struct device_node *np) { return mct_init_dt(np, MCT_INT_SPI); } -static void __init mct_init_ppi(struct device_node *np) +static int __init mct_init_ppi(struct device_node *np) { return mct_init_dt(np, MCT_INT_PPI); } -CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi); -CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi); +CLOCKSOURCE_OF_DECLARE_RET(exynos4210, "samsung,exynos4210-mct", mct_init_spi); +CLOCKSOURCE_OF_DECLARE_RET(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);