From patchwork Wed Jun 1 09:45:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9146945 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3D9D6607D8 for ; Wed, 1 Jun 2016 09:49:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2D5AB2040D for ; Wed, 1 Jun 2016 09:49:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2213A26785; Wed, 1 Jun 2016 09:49:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D88412040D for ; Wed, 1 Jun 2016 09:49:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751197AbcFAJsg (ORCPT ); Wed, 1 Jun 2016 05:48:36 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:65080 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751488AbcFAJse (ORCPT ); Wed, 1 Jun 2016 05:48:34 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O8300GE078UV070@mailout3.w1.samsung.com>; Wed, 01 Jun 2016 10:48:30 +0100 (BST) X-AuditID: cbfec7f5-f792a6d000001302-24-574eaf6e31f9 Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 6B.83.04866.E6FAE475; Wed, 1 Jun 2016 10:48:30 +0100 (BST) Received: from AMDC2174.DIGITAL.local ([106.120.53.17]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O8300GFP78QSC00@eusync3.samsung.com>; Wed, 01 Jun 2016 10:48:30 +0100 (BST) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , Javier Martinez Canillas , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Bartlomiej Zolnierkiewicz Subject: [PATCH 2/3] clk: samsung: exynos5410: Add WDT, ACLK266 and SSS clocks Date: Wed, 01 Jun 2016 11:45:50 +0200 Message-id: <1464774351-23604-2-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1464774351-23604-1-git-send-email-k.kozlowski@samsung.com> References: <1464774351-23604-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHLMWRmVeSWpSXmKPExsVy+t/xq7p56/3CDXbNZLPYOGM9q8X8I+dY Ld68XcNk8fqFoUX/49fMFpseX2O1+Nhzj9Xi8q45bBYzzu9jsrh4ytXi8Jt2VosfZ7pZLFbt +sPowOvx/kYru8flvl4mj52z7rJ7bFrVyeaxeUm9x5Z+IK9vyypGj8+b5AI4orhsUlJzMstS i/TtErgyrh6ZzV5wmavi/tyjLA2M3zi6GDk5JARMJHr6ZzJD2GISF+6tZ+ti5OIQEljKKDF/ 2RIop5FJYvvyB4wgVWwCxhKbl4MkODlEBK4yS5y6pAhiMwtYSGzdupodxBYW8JNY2/ieFcRm EVCVWP18C9gGXgF3iS/dK9kgtslJnDw2GayGU8BD4sz/drC4EFDNo94XTBMYeRcwMqxiFE0t TS4oTkrPNdIrTswtLs1L10vOz93ECAnVrzsYlx6zOsQowMGoxMNbcdk3XIg1say4MvcQowQH s5II75xVfuFCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeWfueh8iJJCeWJKanZpakFoEk2Xi4JRq YFwXvP3C3+uOPNk16oq9K9V2ZO4N/CCuz9ZfUrOg9cNX1sdb3otsuvUsfZeprLfFwRnBS66c 7T3XL5N6JJm3VXh9k7LFh+Ntzvc43u/oPsF05Hz80TaZmTsk08oSsrM3Kzr1XzyuWn3wWIXi w3hbg6rPU51Sbi3//svQZEHUl+1mVgLncpbqaCixFGckGmoxFxUnAgAFQw94UQIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add clock hierarchy for Security SubSystem clock and watchdog. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas --- drivers/clk/samsung/clk-exynos5410.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c index db9978dc6e83..7e3ffa70d364 100644 --- a/drivers/clk/samsung/clk-exynos5410.c +++ b/drivers/clk/samsung/clk-exynos5410.c @@ -31,6 +31,7 @@ #define SRC_CPU 0x200 #define DIV_CPU0 0x500 #define SRC_CPERI1 0x4204 +#define GATE_IP_G2D 0x8800 #define DIV_TOP0 0x10510 #define DIV_TOP1 0x10514 #define DIV_FSYS0 0x10548 @@ -154,11 +155,15 @@ static struct samsung_div_clock exynos5410_div_clks[] __initdata = { DIV(0, "dout_pwm", "mout_pwm", DIV_PERIC3, 0, 4), DIV(0, "aclk200", "mout_aclk200", DIV_TOP0, 12, 3), + DIV(0, "aclk266", "mpll_user_p", DIV_TOP0, 16, 3), DIV(0, "aclk400", "mout_aclk400", DIV_TOP0, 24, 3), }; static struct samsung_gate_clock exynos5410_gate_clks[] __initdata = { + GATE(CLK_SSS, "sss", "aclk266", GATE_IP_G2D, 2, 0, 0), + GATE(CLK_MCT, "mct", "aclk66", GATE_IP_PERIS, 18, 0, 0), + GATE(CLK_WDT, "wdt", "aclk66", GATE_IP_PERIS, 19, 0, 0), GATE(CLK_RTC, "rtc", "aclk66", GATE_IP_PERIS, 20, 0, 0), GATE(CLK_TMU, "tmu", "aclk66", GATE_IP_PERIS, 21, 0, 0),