From patchwork Tue Jun 14 11:46:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yakir Yang X-Patchwork-Id: 9175639 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C63F66075D for ; Tue, 14 Jun 2016 11:48:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B78B925EF7 for ; Tue, 14 Jun 2016 11:48:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AC4C7280E0; Tue, 14 Jun 2016 11:48:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0891325EF7 for ; Tue, 14 Jun 2016 11:48:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751897AbcFNLsG (ORCPT ); Tue, 14 Jun 2016 07:48:06 -0400 Received: from lucky1.263xmail.com ([211.157.147.134]:51914 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752622AbcFNLqX (ORCPT ); Tue, 14 Jun 2016 07:46:23 -0400 Received: from ykk?rock-chips.com (unknown [192.168.167.140]) by lucky1.263xmail.com (Postfix) with SMTP id F38AB7C5; Tue, 14 Jun 2016 19:46:18 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 3D8633EDA; Tue, 14 Jun 2016 19:46:09 +0800 (CST) X-RL-SENDER: ykk@rock-chips.com X-FST-TO: yzq@rock-chips.com X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: ykk@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: ykk@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 3149828FNLR; Tue, 14 Jun 2016 19:46:11 +0800 (CST) From: Yakir Yang To: Mark Yao , Inki Dae , Jingoo Han , Heiko Stuebner Cc: Javier Martinez Canillas , =?UTF-8?q?St=C3=A9phane=20Marchesin?= , Tomasz Figa , David Airlie , daniel.vetter@ffwll.ch, Thierry Reding , dianders@chromium.org, Krzysztof Kozlowski , emil.l.velikov@gmail.com, Dan Carpenter , Yakir Yang , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 04/10] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting Date: Tue, 14 Jun 2016 19:46:16 +0800 Message-Id: <1465904776-891-1-git-send-email-ykk@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465904718-663-1-git-send-email-ykk@rock-chips.com> References: <1465904718-663-1-git-send-email-ykk@rock-chips.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As vendor document indicate, when REF_CLK bit set 0, then DP phy's REF_CLK should switch to 24M source clock. But due to IC PHY layout mistaken, some chips need to flip this bit(like RK3288), and unfortunately they didn't indicate in the DP version register. That's why we have to make this little hack. Signed-off-by: Yakir Yang Tested-by: Javier Martinez Canillas --- Changes in v3: - Make this hack code more clear (Tomasz, reviewed at Google Gerrit) reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK; [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80] - Add tested flag from Javier Changes in v2: - new patch in v2 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 6 +++++- drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 1 + drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 3 +++ include/drm/bridge/analogix_dp.h | 5 +++++ 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c index 931a76c..97ced6b 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -75,7 +75,11 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp) writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) { - writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1); + reg = REF_CLK_24M; + if (dp->plat_data->subdev_type == RK3288_DP) + reg ^= REF_CLK_MASK; + + writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2); writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3); writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4); diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h index 88d56ad..cdcc6c5 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h @@ -165,6 +165,7 @@ /* ANALOGIX_DP_PLL_REG_1 */ #define REF_CLK_24M (0x1 << 0) #define REF_CLK_27M (0x0 << 0) +#define REF_CLK_MASK (0x1 << 0) /* ANALOGIX_DP_LANE_MAP */ #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 3855f46..315ebba 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -46,6 +46,7 @@ struct rockchip_dp_chip_data { u32 lcdsel_grf_reg; u32 lcdsel_big; u32 lcdsel_lit; + u32 chip_type; }; struct rockchip_dp_device { @@ -286,6 +287,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master, dp->plat_data.encoder = &dp->encoder; dp->plat_data.dev_type = ROCKCHIP_DP; + dp->plat_data.subdev_type = dp_data->chip_type; dp->plat_data.power_on = rockchip_dp_poweron; dp->plat_data.power_off = rockchip_dp_powerdown; @@ -384,6 +386,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = { .lcdsel_grf_reg = 0x025c, .lcdsel_big = 0 | BIT(21), .lcdsel_lit = BIT(5) | BIT(21), + .chip_type = RK3288_DP, }; static const struct of_device_id rockchip_dp_dt_ids[] = { diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h index 9e5d013..06c0250 100644 --- a/include/drm/bridge/analogix_dp.h +++ b/include/drm/bridge/analogix_dp.h @@ -18,8 +18,13 @@ enum analogix_dp_devtype { ROCKCHIP_DP, }; +enum analogix_dp_sub_devtype { + RK3288_DP, +}; + struct analogix_dp_plat_data { enum analogix_dp_devtype dev_type; + enum analogix_dp_sub_devtype subdev_type; struct drm_panel *panel; struct drm_encoder *encoder; struct drm_connector *connector;