From patchwork Fri Jun 17 07:54:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 9182903 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1FB736075F for ; Fri, 17 Jun 2016 07:54:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F55428303 for ; Fri, 17 Jun 2016 07:54:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 043152835E; Fri, 17 Jun 2016 07:54:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9D48528303 for ; Fri, 17 Jun 2016 07:54:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755322AbcFQHyr (ORCPT ); Fri, 17 Jun 2016 03:54:47 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:32968 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755253AbcFQHyq (ORCPT ); Fri, 17 Jun 2016 03:54:46 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O8W009RTON62X30@mailout2.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Fri, 17 Jun 2016 08:54:42 +0100 (BST) X-AuditID: cbfec7f4-f796c6d000001486-3f-5763acc2dfa5 Received: from eusync1.samsung.com ( [203.254.199.211]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 68.FF.05254.2CCA3675; Fri, 17 Jun 2016 08:54:42 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0O8W00AVTOMWCT10@eusync1.samsung.com>; Fri, 17 Jun 2016 08:54:42 +0100 (BST) From: Marek Szyprowski To: dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Inki Dae , Joonyoung Shim , Seung-Woo Kim , Andrzej Hajda , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH v2 5/5] drm/exynos: iommu: add support for ARM64 specific code for IOMMU glue Date: Fri, 17 Jun 2016 09:54:27 +0200 Message-id: <1466150067-8065-6-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1466150067-8065-1-git-send-email-m.szyprowski@samsung.com> References: <1466150067-8065-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprILMWRmVeSWpSXmKPExsVy+t/xy7qH1iSHG7z7KGBxa905VouNM9az Wlz5+p7NYtL9CSwWL+5dZLF4/cLQYsb5fUwWa4/cZbeYMfklmwOnx/3u40wefVtWMXp83iQX wBzFZZOSmpNZllqkb5fAlXF5aT97wS+pihuTm1gaGE+JdTFyckgImEhMWf+YFcIWk7hwbz0b iC0ksJRR4vyVYAi7iUni6eJiEJtNwFCi620XWI2IgJtE0+GZQL1cHMwCW5gk2ndtZOpi5OAQ FoiX6FydB1LDIqAqMe/wbEYQm1fAXeLuu1vsELvkJE4emwy2l1PAQ+Lh/h5GiF3uEnPPL2WZ wMi7gJFhFaNoamlyQXFSeq6hXnFibnFpXrpecn7uJkZIQH3Zwbj4mNUhRgEORiUe3hWiyeFC rIllxZW5hxglOJiVRHgZVwGFeFMSK6tSi/Lji0pzUosPMUpzsCiJ887d9T5ESCA9sSQ1OzW1 ILUIJsvEwSnVwOhwOvjfj0KVzvlPbqh0m/bnCm1Yt/TChHLNi1NeTk1+qS3Ge6poQezPHFdh 8YfzJRfbFuyXbQjb8nkB785rB0OKlD1X2ipcXRXz2zTpR/G5hXpZd6Wipv0VE3DxnhEd0dy7 u2vmna1qBQEM8beasiQSGD4JztSu5XKcOEm8vdpCLLdc6t/HPiWW4oxEQy3mouJEAAwipJQk AgAA Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for ARM 64bit architecture with IOMMU-DMA glue code, so Exynos DRM can be now used on Exynos 5433 with IOMMU enabled. Signed-off-by: Marek Szyprowski --- drivers/gpu/drm/exynos/Kconfig | 2 +- drivers/gpu/drm/exynos/exynos_drm_drv.c | 7 +--- drivers/gpu/drm/exynos/exynos_drm_iommu.h | 55 +++++++++++++++++++++++++++++++ 3 files changed, 57 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig index d814b3048ee5..343813a5fbc8 100644 --- a/drivers/gpu/drm/exynos/Kconfig +++ b/drivers/gpu/drm/exynos/Kconfig @@ -15,7 +15,7 @@ if DRM_EXYNOS config DRM_EXYNOS_IOMMU bool - depends on EXYNOS_IOMMU && ARM_DMA_USE_IOMMU + depends on EXYNOS_IOMMU default y comment "CRTCs" diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c index 2dd820e23b0c..062fa9fea0f2 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c @@ -159,12 +159,7 @@ static int exynos_drm_load(struct drm_device *dev, unsigned long flags) DRM_INFO("Exynos DRM: using %s device for DMA mapping operations\n", dev_name(private->dma_dev)); - /* - * create mapping to manage iommu table and set a pointer to iommu - * mapping structure to iommu_mapping of private data. - * also this iommu_mapping can be used to check if iommu is supported - * or not. - */ + /* create common IOMMU mapping for all devices attached to Exynos DRM */ ret = drm_create_iommu_mapping(dev); if (ret < 0) { DRM_ERROR("failed to create iommu mapping.\n"); diff --git a/drivers/gpu/drm/exynos/exynos_drm_iommu.h b/drivers/gpu/drm/exynos/exynos_drm_iommu.h index 22e1df2ac62e..c8de4913fdbe 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_iommu.h +++ b/drivers/gpu/drm/exynos/exynos_drm_iommu.h @@ -49,6 +49,61 @@ static inline void __exynos_iommu_detach(struct exynos_drm_private *priv, arm_iommu_detach_device(dev); } +#elif defined(CONFIG_IOMMU_DMA) +#include + +static inline int __exynos_iommu_create_mapping(struct exynos_drm_private *priv, + unsigned long start, unsigned long size) +{ + struct iommu_domain *domain; + int ret; + + domain = iommu_domain_alloc(priv->dma_dev->bus); + if (!domain) + return -ENOMEM; + + ret = iommu_get_dma_cookie(domain); + if (ret) + goto free_domain; + + ret = iommu_dma_init_domain(domain, start, size); + if (ret) + goto put_cookie; + + priv->mapping = domain; + return 0; + +put_cookie: + iommu_put_dma_cookie(domain); +free_domain: + iommu_domain_free(domain); + return ret; +} + +static inline void __exynos_iommu_release_mapping(struct exynos_drm_private *priv) +{ + struct iommu_domain *domain = priv->mapping; + + iommu_put_dma_cookie(domain); + iommu_domain_free(domain); + priv->mapping = NULL; +} + +static inline int __exynos_iommu_attach(struct exynos_drm_private *priv, + struct device *dev) +{ + struct iommu_domain *domain = priv->mapping; + + return iommu_attach_device(domain, dev); +} + +static inline void __exynos_iommu_detach(struct exynos_drm_private *priv, + struct device *dev) +{ + struct iommu_domain *domain = priv->mapping; + + iommu_detach_device(domain, dev); +} #else #error Unsupported architecture and IOMMU/DMA-mapping glue code #endif