From patchwork Tue Aug 16 13:35:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9283865 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EE606600CB for ; Tue, 16 Aug 2016 13:38:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DDA5B28995 for ; Tue, 16 Aug 2016 13:38:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D1A2928AEE; Tue, 16 Aug 2016 13:38:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3E1D228995 for ; Tue, 16 Aug 2016 13:38:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753882AbcHPNiV (ORCPT ); Tue, 16 Aug 2016 09:38:21 -0400 Received: from mailout3.w1.samsung.com ([210.118.77.13]:41847 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753866AbcHPNgp (ORCPT ); Tue, 16 Aug 2016 09:36:45 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OC000GCX8H1PZ30@mailout3.w1.samsung.com>; Tue, 16 Aug 2016 14:36:37 +0100 (BST) X-AuditID: cbfec7f5-f792a6d000001302-51-57b316e5b36f Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 5A.AB.04866.5E613B75; Tue, 16 Aug 2016 14:36:37 +0100 (BST) Received: from AMDC2174.DIGITAL.local ([106.120.53.17]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OC000MRK8GNJF30@eusync3.samsung.com>; Tue, 16 Aug 2016 14:36:37 +0100 (BST) From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd , Stephen Warren , Lee Jones , Eric Anholt , Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Kukjin Kim , Russell King , Mark Brown , linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org, alsa-devel@alsa-project.org Cc: Marek Szyprowski , Charles Keepax , Javier Martinez Canillas , a.hajda@samsung.com, Bartlomiej Zolnierkiewicz Subject: [RFC 09/17] clk: divider: Switch to new clock controller API Date: Tue, 16 Aug 2016 15:35:06 +0200 Message-id: <1471354514-24224-10-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1471354514-24224-1-git-send-email-k.kozlowski@samsung.com> References: <1471354514-24224-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMIsWRmVeSWpSXmKPExsVy+t/xq7pPxTaHGyzbwW9xa905VosrFw8x WWycsZ7VYm3vURaLqQ+fsFn8m3KD3eJA42VGi1/vjrBbvHm7hsni9QtDi/7Hr5ktdrQtZLHY 9Pgaq8XHnnusFh1/vzBaXN41h81i4u0N7BYzzu9jsjg0dS+jxdojd9ktLp5ytXg6czObxeE3 7awWP850s1i8W/2E0eLVwTYWi1W7/jA6SHts+NzE5tH0/hibx+VrF5k93t9oZfeYdf8skNvX y+Sxc9Zddo9NqzrZPDYvqfd4OfE3m8eWfqBQ35ZVjB6fN8l5bJwbGsAXxWWTkpqTWZZapG+X wJXx/MJUxoLTFhXHG04yNTAu1O9i5OSQEDCRaD58lB3CFpO4cG89WxcjF4eQwFJGiTVHn7NA OI1MEov+rmAGqWITMJbYvHwJWJWIwCo2iYV/1zKBOMwCLxklzp78xQRSJSzgKnHxTTMbiM0i oCpxe+1OFhCbV8BD4tC6/1D75CROHpvMCmJzAsXPXWgE2yAk4C5xcn07ywRG3gWMDKsYRVNL kwuKk9JzjfSKE3OLS/PS9ZLzczcxQqLu6w7GpcesDjEKcDAq8fCeYNgULsSaWFZcmXuIUYKD WUmE97Do5nAh3pTEyqrUovz4otKc1OJDjNIcLErivDN3vQ8REkhPLEnNTk0tSC2CyTJxcEo1 MJqZhXfPWaKT8f+AyIOLv4JrY7WlRTe+D1F5PPvTgyv2gkK3q5yOGDOrW/vWb3uicNk2v3Tr /OsNzJLtIYdafl9kb1bytzM7Ysh6fcPDs1PCpVSnbvy6PCf66oYTeexdvqarhY9N8v1Xdi46 QWjS+pkGjBwlRy7y6eyeY3zWzdHrmOWZriPvlJVYijMSDbWYi4oTAd240k62AgAA Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Allocate a clock controller and use new clk_register_with_ctrl() API. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/clk-divider.c | 10 +++++++--- drivers/clk/clk-fractional-divider.c | 5 +++-- drivers/clk/samsung/clk.c | 8 ++++---- include/linux/clk-provider.h | 13 +++++++++---- 4 files changed, 23 insertions(+), 13 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index a0f55bc1ad3d..8e9e89f8c5a8 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -490,7 +490,8 @@ static struct clk_hw *_register_divider(struct device *dev, const char *name, * @clk_divider_flags: divider-specific flags for this clock * @lock: shared register lock for this clock */ -struct clk *clk_register_divider(struct device *dev, const char *name, +struct clk *clk_register_divider(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, spinlock_t *lock) @@ -517,7 +518,8 @@ EXPORT_SYMBOL_GPL(clk_register_divider); * @clk_divider_flags: divider-specific flags for this clock * @lock: shared register lock for this clock */ -struct clk_hw *clk_hw_register_divider(struct device *dev, const char *name, +struct clk_hw *clk_hw_register_divider(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, spinlock_t *lock) @@ -541,7 +543,8 @@ EXPORT_SYMBOL_GPL(clk_hw_register_divider); * @table: array of divider/value pairs ending with a div set to 0 * @lock: shared register lock for this clock */ -struct clk *clk_register_divider_table(struct device *dev, const char *name, +struct clk *clk_register_divider_table(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, @@ -572,6 +575,7 @@ EXPORT_SYMBOL_GPL(clk_register_divider_table); * @lock: shared register lock for this clock */ struct clk_hw *clk_hw_register_divider_table(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index aab904618eb6..1b712a424fd4 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -117,6 +117,7 @@ const struct clk_ops clk_fractional_divider_ops = { EXPORT_SYMBOL_GPL(clk_fractional_divider_ops); struct clk_hw *clk_hw_register_fractional_divider(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, u8 clk_divider_flags, spinlock_t *lock) @@ -158,14 +159,14 @@ struct clk_hw *clk_hw_register_fractional_divider(struct device *dev, } EXPORT_SYMBOL_GPL(clk_hw_register_fractional_divider); -struct clk *clk_register_fractional_divider(struct device *dev, +struct clk *clk_register_fractional_divider(struct device *dev, struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, u8 clk_divider_flags, spinlock_t *lock) { struct clk_hw *hw; - hw = clk_hw_register_fractional_divider(dev, name, parent_name, flags, + hw = clk_hw_register_fractional_divider(dev, ctrl, name, parent_name, flags, reg, mshift, mwidth, nshift, nwidth, clk_divider_flags, lock); if (IS_ERR(hw)) diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index 7bfd895781c5..9a8068d4da77 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -230,14 +230,14 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx, for (idx = 0; idx < nr_clk; idx++, list++) { if (list->table) - clk = clk_register_divider_table(NULL, list->name, - list->parent_name, list->flags, + clk = clk_register_divider_table(NULL, ctx->clk_ctrl, + list->name, list->parent_name, list->flags, ctx->reg_base + list->offset, list->shift, list->width, list->div_flags, list->table, &ctx->lock); else - clk = clk_register_divider(NULL, list->name, - list->parent_name, list->flags, + clk = clk_register_divider(NULL, ctx->clk_ctrl, + list->name, list->parent_name, list->flags, ctx->reg_base + list->offset, list->shift, list->width, list->div_flags, &ctx->lock); if (IS_ERR(clk)) { diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 26171815948e..cfb3aa3912c5 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -428,20 +428,23 @@ int divider_get_val(unsigned long rate, unsigned long parent_rate, const struct clk_div_table *table, u8 width, unsigned long flags); -struct clk *clk_register_divider(struct device *dev, const char *name, - const char *parent_name, unsigned long flags, +struct clk *clk_register_divider(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, spinlock_t *lock); -struct clk_hw *clk_hw_register_divider(struct device *dev, const char *name, +struct clk_hw *clk_hw_register_divider(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, spinlock_t *lock); -struct clk *clk_register_divider_table(struct device *dev, const char *name, +struct clk *clk_register_divider_table(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); struct clk_hw *clk_hw_register_divider_table(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, @@ -586,10 +589,12 @@ struct clk_fractional_divider { extern const struct clk_ops clk_fractional_divider_ops; struct clk *clk_register_fractional_divider(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, u8 clk_divider_flags, spinlock_t *lock); struct clk_hw *clk_hw_register_fractional_divider(struct device *dev, + struct clk_ctrl *ctrl, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, u8 clk_divider_flags, spinlock_t *lock);