From patchwork Tue Aug 16 13:35:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9283887 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8A389600CB for ; Tue, 16 Aug 2016 13:39:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 788A228759 for ; Tue, 16 Aug 2016 13:39:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6C97628AEE; Tue, 16 Aug 2016 13:39:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D873028759 for ; Tue, 16 Aug 2016 13:39:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932200AbcHPNjS (ORCPT ); Tue, 16 Aug 2016 09:39:18 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:59593 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753742AbcHPNgn (ORCPT ); Tue, 16 Aug 2016 09:36:43 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OC000IFJ8H4AU30@mailout1.w1.samsung.com>; Tue, 16 Aug 2016 14:36:40 +0100 (BST) X-AuditID: cbfec7f5-f792a6d000001302-62-57b316e8ddff Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 61.BB.04866.8E613B75; Tue, 16 Aug 2016 14:36:40 +0100 (BST) Received: from AMDC2174.DIGITAL.local ([106.120.53.17]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OC000MRK8GNJF30@eusync3.samsung.com>; Tue, 16 Aug 2016 14:36:40 +0100 (BST) From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd , Stephen Warren , Lee Jones , Eric Anholt , Florian Fainelli , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Krzysztof Kozlowski , Sylwester Nawrocki , Tomasz Figa , Kukjin Kim , Russell King , Mark Brown , linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-i2c@vger.kernel.org, alsa-devel@alsa-project.org Cc: Marek Szyprowski , Charles Keepax , Javier Martinez Canillas , a.hajda@samsung.com, Bartlomiej Zolnierkiewicz Subject: [RFC 11/17] clk: gpio: Switch to new clock controller API Date: Tue, 16 Aug 2016 15:35:08 +0200 Message-id: <1471354514-24224-12-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1471354514-24224-1-git-send-email-k.kozlowski@samsung.com> References: <1471354514-24224-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMIsWRmVeSWpSXmKPExsVy+t/xq7ovxDaHG2x5pGJxa905VosrFw8x WWycsZ7VYm3vURaLqQ+fsFn8m3KD3eJA42VGi1/vjrBbvHm7hsni9QtDi/7Hr5ktdrQtZLHY 9Pgaq8XHnnusFh1/vzBaXN41h81i4u0N7BYzzu9jsjg0dS+jxdojd9ktLp5ytXg6czObxeE3 7awWP850s1i8W/2E0eLVwTYWi1W7/jA6SHts+NzE5tH0/hibx+VrF5k93t9oZfeYdf8skNvX y+Sxc9Zddo9NqzrZPDYvqfd4OfE3m8eWfqBQ35ZVjB6fN8l5bJwbGsAXxWWTkpqTWZZapG+X wJVxfMkjtoJXuhVbJu1jbWCcptbFyMkhIWAi0fj7JDuELSZx4d56ti5GLg4hgaWMEnPPnWGE cBqZJP5N/8cMUsUmYCyxefkSsCoRgVVsEgv/rmUCcZgFXjJKnD35iwmkSljASeLuvq8sIDaL gKrEkvmzwbp5BTwkjs5bygqxT07i5LHJYDYnUPzchUawGiEBd4mT69tZJjDyLmBkWMUomlqa XFCclJ5rpFecmFtcmpeul5yfu4kREnVfdzAuPWZ1iFGAg1GJh/cEw6ZwIdbEsuLK3EOMEhzM SiK8h0U3hwvxpiRWVqUW5ccXleakFh9ilOZgURLnnbnrfYiQQHpiSWp2ampBahFMlomDU6qB UXbFhH+iTSZZh0okPfunCLlvOMKgem1S2IpXBdM2rrdjCUqePjvneNP0wwJvHBZ7h7JfTH3r LK39cP9qIa0nGad++Xozhu20eL1kW/bUV6sUSnTudlhcmlHY/W7RHD8ZY/v5C5d3/2l8UVEd anOkSe/r7TsW06ex6z4v3rvcetrdtG/f886f36rEUpyRaKjFXFScCABrWNJbtgIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Allocate a clock controller and use new clk_register_with_ctrl() API. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/clk-gpio.c | 29 +++++++++++++++++------------ include/linux/clk-provider.h | 12 ++++++++---- 2 files changed, 25 insertions(+), 16 deletions(-) diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c index 86b245746a6b..8ebd520c1aa0 100644 --- a/drivers/clk/clk-gpio.c +++ b/drivers/clk/clk-gpio.c @@ -94,7 +94,8 @@ const struct clk_ops clk_gpio_mux_ops = { }; EXPORT_SYMBOL_GPL(clk_gpio_mux_ops); -static struct clk_hw *clk_register_gpio(struct device *dev, const char *name, +static struct clk_hw *clk_register_gpio(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char * const *parent_names, u8 num_parents, unsigned gpio, bool active_low, unsigned long flags, const struct clk_ops *clk_gpio_ops) @@ -168,25 +169,27 @@ static struct clk_hw *clk_register_gpio(struct device *dev, const char *name, * @active_low: true if gpio should be set to 0 to enable clock * @flags: clock flags */ -struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name, +struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char *parent_name, unsigned gpio, bool active_low, unsigned long flags) { - return clk_register_gpio(dev, name, + return clk_register_gpio(dev, ctrl, name, (parent_name ? &parent_name : NULL), (parent_name ? 1 : 0), gpio, active_low, flags, &clk_gpio_gate_ops); } EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate); -struct clk *clk_register_gpio_gate(struct device *dev, const char *name, +struct clk *clk_register_gpio_gate(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char *parent_name, unsigned gpio, bool active_low, unsigned long flags) { struct clk_hw *hw; - hw = clk_hw_register_gpio_gate(dev, name, parent_name, gpio, active_low, - flags); + hw = clk_hw_register_gpio_gate(dev, ctrl, name, parent_name, gpio, + active_low, flags); if (IS_ERR(hw)) return ERR_CAST(hw); return hw->clk; @@ -203,7 +206,8 @@ EXPORT_SYMBOL_GPL(clk_register_gpio_gate); * @active_low: true if gpio should be set to 0 to enable clock * @flags: clock flags */ -struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name, +struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char * const *parent_names, u8 num_parents, unsigned gpio, bool active_low, unsigned long flags) { @@ -212,18 +216,19 @@ struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name, return ERR_PTR(-EINVAL); } - return clk_register_gpio(dev, name, parent_names, num_parents, + return clk_register_gpio(dev, ctrl, name, parent_names, num_parents, gpio, active_low, flags, &clk_gpio_mux_ops); } EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux); -struct clk *clk_register_gpio_mux(struct device *dev, const char *name, +struct clk *clk_register_gpio_mux(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char * const *parent_names, u8 num_parents, unsigned gpio, bool active_low, unsigned long flags) { struct clk_hw *hw; - hw = clk_hw_register_gpio_mux(dev, name, parent_names, num_parents, + hw = clk_hw_register_gpio_mux(dev, ctrl, name, parent_names, num_parents, gpio, active_low, flags); if (IS_ERR(hw)) return ERR_CAST(hw); @@ -271,10 +276,10 @@ static int gpio_clk_driver_probe(struct platform_device *pdev) active_low = of_flags & OF_GPIO_ACTIVE_LOW; if (is_mux) - clk = clk_register_gpio_mux(&pdev->dev, node->name, + clk = clk_register_gpio_mux(&pdev->dev, NULL, node->name, parent_names, num_parents, gpio, active_low, 0); else - clk = clk_register_gpio_gate(&pdev->dev, node->name, + clk = clk_register_gpio_gate(&pdev->dev, NULL, node->name, parent_names ? parent_names[0] : NULL, gpio, active_low, 0); if (IS_ERR(clk)) diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 2bd0a8cb7a9c..c39760cba9ac 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -698,10 +698,12 @@ struct clk_gpio { #define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw) extern const struct clk_ops clk_gpio_gate_ops; -struct clk *clk_register_gpio_gate(struct device *dev, const char *name, +struct clk *clk_register_gpio_gate(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char *parent_name, unsigned gpio, bool active_low, unsigned long flags); -struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name, +struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char *parent_name, unsigned gpio, bool active_low, unsigned long flags); void clk_hw_unregister_gpio_gate(struct clk_hw *hw); @@ -717,10 +719,12 @@ void clk_hw_unregister_gpio_gate(struct clk_hw *hw); */ extern const struct clk_ops clk_gpio_mux_ops; -struct clk *clk_register_gpio_mux(struct device *dev, const char *name, +struct clk *clk_register_gpio_mux(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char * const *parent_names, u8 num_parents, unsigned gpio, bool active_low, unsigned long flags); -struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name, +struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, struct clk_ctrl *ctrl, + const char *name, const char * const *parent_names, u8 num_parents, unsigned gpio, bool active_low, unsigned long flags); void clk_hw_unregister_gpio_mux(struct clk_hw *hw);