From patchwork Fri Sep 16 20:01:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 9336553 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1CA956077F for ; Fri, 16 Sep 2016 20:01:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0B2602A070 for ; Fri, 16 Sep 2016 20:01:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F3EFF2A090; Fri, 16 Sep 2016 20:01:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3414C2A070 for ; Fri, 16 Sep 2016 20:01:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965163AbcIPUBb (ORCPT ); Fri, 16 Sep 2016 16:01:31 -0400 Received: from mail.kernel.org ([198.145.29.136]:46132 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965133AbcIPUBa (ORCPT ); Fri, 16 Sep 2016 16:01:30 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DBCD620480; Fri, 16 Sep 2016 20:01:27 +0000 (UTC) Received: from localhost.localdomain (89-66-181-234.dynamic.chello.pl [89.66.181.234]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 73A9420386; Fri, 16 Sep 2016 20:01:23 +0000 (UTC) From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Javier Martinez Canillas , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Geert Uytterhoeven , Alban Browaeys , Marc Zyngier Subject: [RFT] arm64 dts: exynos: Fix invalid GIC interrupt flags in exynos7 Date: Fri, 16 Sep 2016 22:01:13 +0200 Message-Id: <1474056073-8071-1-git-send-email-krzk@kernel.org> X-Mailer: git-send-email 2.7.4 In-reply-to: <1474054971-16831-1-git-send-email-krzk@kernel.org> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and generates an error: genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68) The GIC requires shared interrupts to be edge rising or level high. Platform declares support for both. Choose level high everywhere. Reported-by: Marek Szyprowski Reported-by: Geert Uytterhoeven Reported-by: Alban Browaeys Cc: Marc Zyngier Signed-off-by: Krzysztof Kozlowski Tested-by: Alim Akhtar --- arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 20 +++++-- arch/arm64/boot/dts/exynos/exynos7.dtsi | 69 +++++++++++++------------ 2 files changed, 51 insertions(+), 38 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi index f77ddaf21d04..983c63ba38c8 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi @@ -20,8 +20,14 @@ interrupt-controller; interrupt-parent = <&gic>; #interrupt-cells = <2>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>; + interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, + <0 1 IRQ_TYPE_LEVEL_HIGH>, + <0 2 IRQ_TYPE_LEVEL_HIGH>, + <0 3 IRQ_TYPE_LEVEL_HIGH>, + <0 4 IRQ_TYPE_LEVEL_HIGH>, + <0 5 IRQ_TYPE_LEVEL_HIGH>, + <0 6 IRQ_TYPE_LEVEL_HIGH>, + <0 7 IRQ_TYPE_LEVEL_HIGH>; }; gpa1: gpa1 { @@ -31,8 +37,14 @@ interrupt-controller; interrupt-parent = <&gic>; #interrupt-cells = <2>; - interrupts = <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; + interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>, + <0 9 IRQ_TYPE_LEVEL_HIGH> + <0 10 IRQ_TYPE_LEVEL_HIGH>, + <0 11 IRQ_TYPE_LEVEL_HIGH>, + <0 12 IRQ_TYPE_LEVEL_HIGH>, + <0 13 IRQ_TYPE_LEVEL_HIGH>, + <0 14 IRQ_TYPE_LEVEL_HIGH>, + <0 15 IRQ_TYPE_LEVEL_HIGH>; }; gpa2: gpa2 { diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 6328a66ed97e..0a80dabfbe95 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -106,7 +106,7 @@ pdma0: pdma@10E10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10E10000 0x1000>; - interrupts = <0 225 0>; + interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_fsys0 ACLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -117,7 +117,7 @@ pdma1: pdma@10EB0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10EB0000 0x1000>; - interrupts = <0 226 0>; + interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_fsys0 ACLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -220,7 +220,7 @@ serial_0: serial@13630000 { compatible = "samsung,exynos4210-uart"; reg = <0x13630000 0x100>; - interrupts = <0 440 0>; + interrupts = <0 440 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peric0 PCLK_UART0>, <&clock_peric0 SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; @@ -230,7 +230,7 @@ serial_1: serial@14c20000 { compatible = "samsung,exynos4210-uart"; reg = <0x14c20000 0x100>; - interrupts = <0 456 0>; + interrupts = <0 456 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peric1 PCLK_UART1>, <&clock_peric1 SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; @@ -240,7 +240,7 @@ serial_2: serial@14c30000 { compatible = "samsung,exynos4210-uart"; reg = <0x14c30000 0x100>; - interrupts = <0 457 0>; + interrupts = <0 457 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peric1 PCLK_UART2>, <&clock_peric1 SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; @@ -250,7 +250,7 @@ serial_3: serial@14c40000 { compatible = "samsung,exynos4210-uart"; reg = <0x14c40000 0x100>; - interrupts = <0 458 0>; + interrupts = <0 458 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peric1 PCLK_UART3>, <&clock_peric1 SCLK_UART3>; clock-names = "uart", "clk_uart_baud0"; @@ -264,62 +264,62 @@ wakeup-interrupt-controller { compatible = "samsung,exynos7-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 16 0>; + interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>; }; }; pinctrl_bus0: pinctrl@13470000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x13470000 0x1000>; - interrupts = <0 383 0>; + interrupts = <0 383 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_nfc: pinctrl@14cd0000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x14cd0000 0x1000>; - interrupts = <0 473 0>; + interrupts = <0 473 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_touch: pinctrl@14ce0000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x14ce0000 0x1000>; - interrupts = <0 474 0>; + interrupts = <0 474 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_ff: pinctrl@14c90000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x14c90000 0x1000>; - interrupts = <0 475 0>; + interrupts = <0 475 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_ese: pinctrl@14ca0000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x14ca0000 0x1000>; - interrupts = <0 476 0>; + interrupts = <0 476 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_fsys0: pinctrl@10e60000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x10e60000 0x1000>; - interrupts = <0 221 0>; + interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_fsys1: pinctrl@15690000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x15690000 0x1000>; - interrupts = <0 203 0>; + interrupts = <0 203 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_bus1: pinctrl@14870000 { compatible = "samsung,exynos7-pinctrl"; reg = <0x14870000 0x1000>; - interrupts = <0 384 0>; + interrupts = <0 384 IRQ_TYPE_LEVEL_HIGH>; }; hsi2c_0: hsi2c@13640000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13640000 0x1000>; - interrupts = <0 441 0>; + interrupts = <0 441 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -332,7 +332,7 @@ hsi2c_1: hsi2c@13650000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13650000 0x1000>; - interrupts = <0 442 0>; + interrupts = <0 442 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -345,7 +345,7 @@ hsi2c_2: hsi2c@14e60000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e60000 0x1000>; - interrupts = <0 459 0>; + interrupts = <0 459 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -358,7 +358,7 @@ hsi2c_3: hsi2c@14e70000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e70000 0x1000>; - interrupts = <0 460 0>; + interrupts = <0 460 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -371,7 +371,7 @@ hsi2c_4: hsi2c@13660000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13660000 0x1000>; - interrupts = <0 443 0>; + interrupts = <0 443 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -384,7 +384,7 @@ hsi2c_5: hsi2c@13670000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13670000 0x1000>; - interrupts = <0 444 0>; + interrupts = <0 444 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -397,7 +397,7 @@ hsi2c_6: hsi2c@14e00000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e00000 0x1000>; - interrupts = <0 461 0>; + interrupts = <0 461 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -410,7 +410,7 @@ hsi2c_7: hsi2c@13e10000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13e10000 0x1000>; - interrupts = <0 462 0>; + interrupts = <0 462 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -423,7 +423,7 @@ hsi2c_8: hsi2c@14e20000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e20000 0x1000>; - interrupts = <0 463 0>; + interrupts = <0 463 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -436,7 +436,7 @@ hsi2c_9: hsi2c@13680000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13680000 0x1000>; - interrupts = <0 445 0>; + interrupts = <0 445 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -449,7 +449,7 @@ hsi2c_10: hsi2c@13690000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13690000 0x1000>; - interrupts = <0 446 0>; + interrupts = <0 446 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -462,7 +462,7 @@ hsi2c_11: hsi2c@136a0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x136a0000 0x1000>; - interrupts = <0 447 0>; + interrupts = <0 447 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -499,7 +499,8 @@ rtc: rtc@10590000 { compatible = "samsung,s3c6410-rtc"; reg = <0x10590000 0x100>; - interrupts = <0 355 0>, <0 356 0>; + interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>, + <0 356 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_ccore PCLK_RTC>; clock-names = "rtc"; status = "disabled"; @@ -508,7 +509,7 @@ watchdog: watchdog@101d0000 { compatible = "samsung,exynos7-wdt"; reg = <0x101d0000 0x100>; - interrupts = <0 110 0>; + interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peris PCLK_WDT>; clock-names = "watchdog"; samsung,syscon-phandle = <&pmu_system_controller>; @@ -517,7 +518,7 @@ mmc_0: mmc@15740000 { compatible = "samsung,exynos7-dw-mshc-smu"; - interrupts = <0 201 0>; + interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x15740000 0x2000>; @@ -530,7 +531,7 @@ mmc_1: mmc@15750000 { compatible = "samsung,exynos7-dw-mshc"; - interrupts = <0 202 0>; + interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x15750000 0x2000>; @@ -543,7 +544,7 @@ mmc_2: mmc@15560000 { compatible = "samsung,exynos7-dw-mshc-smu"; - interrupts = <0 216 0>; + interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x15560000 0x2000>; @@ -557,7 +558,7 @@ adc: adc@13620000 { compatible = "samsung,exynos7-adc"; reg = <0x13620000 0x100>; - interrupts = <0 448 0>; + interrupts = <0 448 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peric0 PCLK_ADCIF>; clock-names = "adc"; #io-channel-cells = <1>; @@ -577,7 +578,7 @@ tmuctrl_0: tmu@10060000 { compatible = "samsung,exynos7-tmu"; reg = <0x10060000 0x200>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peris PCLK_TMU>, <&clock_peris SCLK_TMU>; clock-names = "tmu_apbif", "tmu_sclk";