Message ID | 1479372648-11242-2-git-send-email-m.szyprowski@samsung.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Hi Marek, 2016-11-17 17:50 GMT+09:00 Marek Szyprowski <m.szyprowski@samsung.com>: > Audio block requires access to two parent clocks: audio PLL and oscillator, > so add this information to device tree bindings documentation. > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > index ffff67a0e9cd..1dc80f8811fe 100644 > --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > @@ -104,6 +104,10 @@ Required Properties: > - sclk_decon_tv_vclk_disp > - aclk_disp_333 > > + Input clocks for audio clock controller: > + - oscclk > + - fout_aud_pll > + > Input clocks for bus0 clock controller: > - aclk_bus0_400 > > @@ -297,6 +301,9 @@ Example 2: Examples of clock controller nodes are listed below. > compatible = "samsung,exynos5433-cmu-aud"; > reg = <0x114c0000 0x0b04>; > #clock-cells = <1>; > + > + clock-names = "oscclk", "fout_aud_pll"; > + clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>; > }; > > cmu_bus0: clock-controller@13600000 { Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index ffff67a0e9cd..1dc80f8811fe 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -104,6 +104,10 @@ Required Properties: - sclk_decon_tv_vclk_disp - aclk_disp_333 + Input clocks for audio clock controller: + - oscclk + - fout_aud_pll + Input clocks for bus0 clock controller: - aclk_bus0_400 @@ -297,6 +301,9 @@ Example 2: Examples of clock controller nodes are listed below. compatible = "samsung,exynos5433-cmu-aud"; reg = <0x114c0000 0x0b04>; #clock-cells = <1>; + + clock-names = "oscclk", "fout_aud_pll"; + clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>; }; cmu_bus0: clock-controller@13600000 {
Audio block requires access to two parent clocks: audio PLL and oscillator, so add this information to device tree bindings documentation. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 7 +++++++ 1 file changed, 7 insertions(+)