From patchwork Sat Dec 10 13:08:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pankaj Dubey X-Patchwork-Id: 9469285 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5D7D660231 for ; Sat, 10 Dec 2016 13:06:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4FA6B284F0 for ; Sat, 10 Dec 2016 13:06:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 441E22858C; Sat, 10 Dec 2016 13:06:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6839F284F0 for ; Sat, 10 Dec 2016 13:06:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752398AbcLJNGV (ORCPT ); Sat, 10 Dec 2016 08:06:21 -0500 Received: from mailout1.samsung.com ([203.254.224.24]:50780 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752323AbcLJNGU (ORCPT ); Sat, 10 Dec 2016 08:06:20 -0500 Received: from epcpsbgm2new.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OHZ0235C0ED59A0@mailout1.samsung.com> for linux-samsung-soc@vger.kernel.org; Sat, 10 Dec 2016 22:06:18 +0900 (KST) X-AuditID: cbfee61b-f796f6d000004092-72-584bfdc924b8 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2new.samsung.com (EPCPMTA) with SMTP id B1.75.16530.9CDFB485; Sat, 10 Dec 2016 22:06:18 +0900 (KST) Received: from pankaj.sisodomain.com ([107.108.83.125]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OHZ000990EAMM70@mmp1.samsung.com>; Sat, 10 Dec 2016 22:06:17 +0900 (KST) From: Pankaj Dubey To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: krzk@kernel.org, arnd@arndb.de, geert+renesas@glider.be, m.szyprowski@samsung.com, javier@osg.samsung.com, kgene@kernel.org, thomas.ab@samsung.com, Pankaj Dubey , Grant Likely , Rob Herring , Linus Walleij Subject: [PATCH v8 1/8] soc: samsung: add exynos chipid driver support Date: Sat, 10 Dec 2016 18:38:36 +0530 Message-id: <1481375323-29724-2-git-send-email-pankaj.dubey@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1481375323-29724-1-git-send-email-pankaj.dubey@samsung.com> References: <1481375323-29724-1-git-send-email-pankaj.dubey@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGIsWRmVeSWpSXmKPExsVy+t9jAd1Tf70jDM6cZbL4O+kYu8Xc2ZMY LQ782cFo8ebtGiaL/sevmS3On9/AbjHlz3Imi02Pr7FazDi/j8li7ZG77BaLtn5ht2jde4Td omMZowOvx+9fkxg9Jp7V9di0qpPN4861PWwem5fUe2zpv8vu0bdlFaPH501yARxRbjYZqYkp qUUKqXnJ+SmZeem2SqEhbroWSgp5ibmptkoRur4hQUoKZYk5pUCekQEacHAOcA9W0rdLcMv4 +n4Ve8FXzYpjW8UbGJcrdzFyckgImEj83LWOHcIWk7hwbz1bFyMXh5DAUkaJk2+2soIkhAR+ MkrMfMIMYrMJ6Eo8eT8XzBYR8JaYfOYvO0gDs8BuJok///cwgiSEBdwkTjWuZgGxWQRUJc7d eARm8wp4SMxsP8oMsU1O4ua5TjCbU8BT4sHtKWwQyzwkvs/byDKBkXcBI8MqRonUguSC4qT0 XKO81HK94sTc4tK8dL3k/NxNjOA4eSa9g/HwLvdDjAIcjEo8vBV23hFCrIllxZW5hxglOJiV RHh3/wAK8aYkVlalFuXHF5XmpBYfYjQFOmwis5Rocj4whvNK4g1NzE3MjQ0szC0tTYyUxHkb Zz8LFxJITyxJzU5NLUgtgulj4uCUamBs91i6+NIVVodDKsEXerYsWuxl0bh76dGri1Q+7E7M 0DxtNM1zddiMzSJKfLfdzdg6V80+PHP52a7/nM6WJ1NPmAnWmLqe2MzlZCS6+fMiD9UWZ4XN 9nfVIk+c2cbv+iTkUEvz5XmqEzlClovtv/Fi9+4//SFHhO6oblggumi9h6So3avbGnvuK7EU ZyQaajEXFScCAPuSr1qpAgAA X-MTR: 20000000000000000@CPGS Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space. This driver uses existing binding for exynos-chipid. CC: Grant Likely CC: Rob Herring CC: Linus Walleij Signed-off-by: Pankaj Dubey [m.szyprowski: for suggestion and code snippet of product_id_to_soc_id] Signed-off-by: Marek Szyprowski --- drivers/soc/samsung/Kconfig | 5 ++ drivers/soc/samsung/Makefile | 1 + drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++ 3 files changed, 122 insertions(+) create mode 100644 drivers/soc/samsung/exynos-chipid.c diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig index 2455339..f9ab858 100644 --- a/drivers/soc/samsung/Kconfig +++ b/drivers/soc/samsung/Kconfig @@ -14,4 +14,9 @@ config EXYNOS_PM_DOMAINS bool "Exynos PM domains" if COMPILE_TEST depends on PM_GENERIC_DOMAINS || COMPILE_TEST +config EXYNOS_CHIPID + bool "Exynos Chipid controller driver" if COMPILE_TEST + depends on (ARM && ARCH_EXYNOS) || ((ARM || ARM64) && COMPILE_TEST) + select SOC_BUS + endif diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile index 3619f2e..2a8a85e 100644 --- a/drivers/soc/samsung/Makefile +++ b/drivers/soc/samsung/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_EXYNOS_PMU) += exynos-pmu.o exynos3250-pmu.o exynos4-pmu.o \ exynos5250-pmu.o exynos5420-pmu.o obj-$(CONFIG_EXYNOS_PM_DOMAINS) += pm_domains.o +obj-$(CONFIG_EXYNOS_CHIPID) += exynos-chipid.o diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c new file mode 100644 index 0000000..cf0128b --- /dev/null +++ b/drivers/soc/samsung/exynos-chipid.c @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * EXYNOS - CHIP ID support + * Author: Pankaj Dubey + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define EXYNOS_SUBREV_MASK (0xF << 4) +#define EXYNOS_MAINREV_MASK (0xF << 0) +#define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | EXYNOS_MAINREV_MASK) + +static const struct exynos_soc_id { + const char *name; + unsigned int id; + unsigned int mask; +} soc_ids[] = { + { "EXYNOS3250", 0xE3472000, 0xFFFFF000 }, + { "EXYNOS4210", 0x43200000, 0xFFFE0000 }, + { "EXYNOS4212", 0x43220000, 0xFFFE0000 }, + { "EXYNOS4412", 0xE4412000, 0xFFFE0000 }, + { "EXYNOS5250", 0x43520000, 0xFFFFF000 }, + { "EXYNOS5260", 0xE5260000, 0xFFFFF000 }, + { "EXYNOS5410", 0xE5410000, 0xFFFFF000 }, + { "EXYNOS5420", 0xE5420000, 0xFFFFF000 }, + { "EXYNOS5440", 0xE5440000, 0xFFFFF000 }, + { "EXYNOS5800", 0xE5422000, 0xFFFFF000 }, + { "EXYNOS7420", 0xE7420000, 0xFFFFF000 }, + { "EXYNOS5433", 0xE5433000, 0xFFFFF000 }, +}; + +static const char * __init product_id_to_soc_id(unsigned int product_id) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(soc_ids); i++) + if ((product_id & soc_ids[i].mask) == soc_ids[i].id) + return soc_ids[i].name; + return "UNKNOWN"; +} + +static const struct of_device_id of_exynos_chipid_ids[] = { + { + .compatible = "samsung,exynos4210-chipid", + }, + {}, +}; + +/** + * exynos_chipid_early_init: Early chipid initialization + */ +int __init exynos_chipid_early_init(void) +{ + struct soc_device_attribute *soc_dev_attr; + struct soc_device *soc_dev; + struct device_node *root; + struct device_node *np; + void __iomem *exynos_chipid_base; + const struct of_device_id *match; + u32 product_id; + u32 revision; + + np = of_find_matching_node_and_match(NULL, + of_exynos_chipid_ids, &match); + if (!np) + return -ENODEV; + + exynos_chipid_base = of_iomap(np, 0); + + if (!exynos_chipid_base) + return PTR_ERR(exynos_chipid_base); + + product_id = readl_relaxed(exynos_chipid_base); + revision = product_id & EXYNOS_REV_MASK; + iounmap(exynos_chipid_base); + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + return -ENODEV; + + soc_dev_attr->family = "Samsung Exynos"; + + root = of_find_node_by_path("/"); + of_property_read_string(root, "model", &soc_dev_attr->machine); + of_node_put(root); + + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%x", revision); + soc_dev_attr->soc_id = product_id_to_soc_id(product_id); + + + pr_info("Exynos: CPU[%s] CPU_REV[0x%x] Detected\n", + product_id_to_soc_id(product_id), revision); + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr->revision); + kfree_const(soc_dev_attr->soc_id); + kfree(soc_dev_attr); + return PTR_ERR(soc_dev); + } + + return 0; +} +early_initcall(exynos_chipid_early_init);