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Thu, 24 Aug 2017 13:34:10 +0000 (GMT) X-AuditID: cbfec7f1-f793a6d00000326b-31-599ed5d39323 Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 51.0D.18832.2D5DE995; Thu, 24 Aug 2017 14:34:10 +0100 (BST) Received: from AMDC2768.DIGITAL.local ([106.120.43.17]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OV60031EZ0V8CD0@eusync4.samsung.com>; Thu, 24 Aug 2017 14:34:10 +0100 (BST) From: Andrzej Hajda To: Inki Dae Cc: Andrzej Hajda , Bartlomiej Zolnierkiewicz , Marek Szyprowski , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v2 06/10] drm/exynos/decon5433: refactor irq requesting code Date: Thu, 24 Aug 2017 15:33:55 +0200 Message-id: <1503581639-580-7-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1503581639-580-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJIsWRmVeSWpSXmKPExsWy7djPc7qXr86LNJj+gs/i1rpzrBYbZ6xn tZh/BMi68vU9m8Wk+xNYLM6f38BuMeP8PiaLtUfusjtweGxa1cnmcb/7OJNH35ZVjB6fN8kF sERx2aSk5mSWpRbp2yVwZWz42claME2iYvaddcwNjAuFuxg5OCQETCQ6N0d0MXICmWISF+6t Z+ti5OIQEljKKPHi6QxmCOczo8TxfTOYIKpMJI79P84EkVjGKPG9v5kRwvnPKDHn6hl2kCo2 AU2Jv5tvsoHYIgLKEqv2tYPFmQWmM0kcatEAsYUFfCT+XpzFBnIGi4CqRMf8VJAwr4CjxPru Z4wQy+Qkbp7rZAaxOQWcJA7uWQF2noTAezaJOxtmM0O8ICux6QAzRL2LxLLDv1ggbGGJV8e3 sEPYMhKdHQeZIHq7GSU+9Z9gh3CmMEr8+zADqtta4vDxi6wQh/JJTNo2HWoBr0RHmxBEiYfE 768T2SBsR4mdVx5APT+VUeLg0RMsExhlFjAyrGIUSS0tzk1PLTbSK07MLS7NS9dLzs/dxAiM 4NP/jn/cwfj+hNUhRgEORiUe3oZL8yKFWBPLiitzDzFKcDArifDu2ggU4k1JrKxKLcqPLyrN SS0+xCjNwaIkzmsb1RYpJJCeWJKanZpakFoEk2Xi4JRqYORrmBy1VVqiXO3sxbadcpFiCRPl 62Kqt/4J1ZgoZzBlV+XNjBN/Lfcken9jX14Qn3VKh+2m4yHjBXa6E6osF/U/ntHHkus/6eHi I+Xr+2foSIe/vn48eUV2V/t8479yZ4LMjxj8WZxU6ZfVcihK6+vdc/PTljbeXv9qfluWiHNB 8VaPILe3j5RYijMSDbWYi4oTAUALePPcAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrBLMWRmVeSWpSXmKPExsVy+t/xa7qXrs6LNDj0Vsfi1rpzrBYbZ6xn tZh/BMi68vU9m8Wk+xNYLM6f38BuMeP8PiaLtUfusjtweGxa1cnmcb/7OJNH35ZVjB6fN8kF sES52WSkJqakFimk5iXnp2TmpdsqhYa46VooKeQl5qbaKkXo+oYEKSmUJeaUAnlGBmjAwTnA PVhJ3y7BLWPDz07WgmkSFbPvrGNuYFwo3MXIySEhYCJx7P9xJghbTOLCvfVsXYxcHEICSxgl jr/+zwrhNDJJ/DgEkuHkYBPQlPi7+SaYLSKgLLFqXzs7iM0sMJNJonkPB4gtLOAj8ffiLKAa Dg4WAVWJjvmpIGFeAUeJ9d3PGCGWyUncPNfJDGJzCjhJHNyzAmykEFDN1df7WCYw8i5gZFjF KJJaWpybnltsqFecmFtcmpeul5yfu4kRGMrbjv3cvIPx0sbgQ4wCHIxKPLwNl+ZFCrEmlhVX 5h5ilOBgVhLh3bURKMSbklhZlVqUH19UmpNafIjRFOimicxSosn5wDjLK4k3NDE0tzQ0Mraw MDcyUhLnVb/cFCkkkJ5YkpqdmlqQWgTTx8TBKdXAGCgUfubNt6cC+9PC2I+tDjGdzJckfFa0 2umnwd94NRuxS1KvVVbLSR2d/17o2GKN7PsHU3/vdr9kuSPh2s8sicfrTr3of/jVbGuU85Mv zeHC6t43v/a1tzw+0mlvcLPrR0rf9GeXL9xPMNjK8Zbz2t2nvevnppnorcoMed5esTSGdVv4 c0auQ0osxRmJhlrMRcWJAINqCwN7AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170824133410eucas1p1959faf82a55f5aed609a23027777389a X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRvsgrw=?= =?UTF-8?B?7ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRtTYW1z?= =?UTF-8?B?dW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-CMS-RootMailID: 20170824133410eucas1p1959faf82a55f5aed609a23027777389a X-RootMTR: 20170824133410eucas1p1959faf82a55f5aed609a23027777389a References: <1503581639-580-1-git-send-email-a.hajda@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To allow runtime validation of mode of work irq request code should be split into two separate phases: - irq reqesting, - irq checking. Following patches will move 2nd phase to mode validation phase. Signed-off-by: Andrzej Hajda --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 54 +++++++++++++++------------ 1 file changed, 30 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 237b4c9..0f5acce 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c @@ -58,6 +58,8 @@ struct decon_context { struct regmap *sysreg; struct clk *clks[ARRAY_SIZE(decon_clks_name)]; unsigned int irq; + unsigned int irq_vsync; + unsigned int irq_lcd_sys; unsigned int te_irq; unsigned long out_type; int first_win; @@ -670,19 +672,22 @@ static const struct of_device_id exynos5433_decon_driver_dt_match[] = { MODULE_DEVICE_TABLE(of, exynos5433_decon_driver_dt_match); static int decon_conf_irq(struct decon_context *ctx, const char *name, - irq_handler_t handler, unsigned long int flags, bool required) + irq_handler_t handler, unsigned long int flags) { struct platform_device *pdev = to_platform_device(ctx->dev); int ret, irq = platform_get_irq_byname(pdev, name); if (irq < 0) { - if (irq == -EPROBE_DEFER) + switch (irq) { + case -EPROBE_DEFER: return irq; - if (required) - dev_err(ctx->dev, "cannot get %s IRQ\n", name); - else - irq = 0; - return irq; + case -ENODATA: + case -ENXIO: + return 0; + default: + dev_err(ctx->dev, "IRQ %s get failed, %d\n", name, irq); + return irq; + } } irq_set_status_flags(irq, IRQ_NOAUTOEN); ret = devm_request_irq(ctx->dev, irq, handler, flags, "drm_decon", ctx); @@ -738,25 +743,26 @@ static int exynos5433_decon_probe(struct platform_device *pdev) return PTR_ERR(ctx->addr); } - if (ctx->out_type & IFTYPE_I80) { - ret = decon_conf_irq(ctx, "lcd_sys", decon_irq_handler, 0, true); - if (ret < 0) - return ret; - ctx->irq = ret; + ret = decon_conf_irq(ctx, "vsync", decon_irq_handler, 0); + if (ret < 0) + return ret; + ctx->irq_vsync = ret; - ret = decon_conf_irq(ctx, "te", decon_te_irq_handler, - IRQF_TRIGGER_RISING, false); - if (ret < 0) - return ret; - if (ret) { - ctx->te_irq = ret; - ctx->out_type &= ~I80_HW_TRG; - } - } else { - ret = decon_conf_irq(ctx, "vsync", decon_irq_handler, 0, true); - if (ret < 0) + ret = decon_conf_irq(ctx, "lcd_sys", decon_irq_handler, 0); + if (ret < 0) + return ret; + ctx->irq_lcd_sys = ret; + + ctx->irq = (ctx->out_type & IFTYPE_I80) ? ctx->irq_lcd_sys + : ctx->irq_vsync; + + ret = decon_conf_irq(ctx, "te", decon_te_irq_handler, + IRQF_TRIGGER_RISING); + if (ret < 0) return ret; - ctx->irq = ret; + if (ret) { + ctx->te_irq = ret; + ctx->out_type &= ~I80_HW_TRG; } if (ctx->out_type & I80_HW_TRG) {