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Mon, 9 Oct 2017 12:01:01 +0000 (GMT) X-AuditID: cbfec7ef-f79ee6d000003120-18-59db64ffc294 Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id FE.C1.20118.DF46BD95; Mon, 9 Oct 2017 13:01:01 +0100 (BST) Received: from AMDC831.digital.local ([106.116.147.122]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OXK00BN11DJ3Y70@eusync4.samsung.com>; Mon, 09 Oct 2017 13:01:01 +0100 (BST) From: Andrzej Pietrasiewicz To: linux-samsung-soc@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: Andrzej Pietrasiewicz , Marek Szyprowski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , Kukjin Kim , Russell King , Mark Rutland , Rob Herring , Kishon Vijay Abraham I , Felipe Balbi , Greg Kroah-Hartman Subject: [PATCHv4 1/2] drivers: phy: add calibrate method Date: Mon, 09 Oct 2017 14:00:50 +0200 Message-id: <1507550451-21324-2-git-send-email-andrzej.p@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1507550451-21324-1-git-send-email-andrzej.p@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCIsWRmVeSWpSXmKPExsWy7djP87r/U25HGrxrF7aY9bKdxWLjjPWs FsfanrBbzD9yjtWiefF6Nov+x6+ZLS487WGzOH9+A7vFpsfXWC1mnN/HZLFoWSuzxaGpexkt 1h65y26x9PpFJovWvUfYHfg91sxbw+hx+dpFZo9NqzrZPPbPXcPusXlJvUffllWMHsdvbGfy +LxJLoAjissmJTUnsyy1SN8ugSvj+fXEguPiFZMf/2NsYJwq3MXIySEhYCLxf1UnI4QtJnHh 3nq2LkYuDiGBZYwSn26sZodwPjNKLJ10hh2m48Ofb4xwVUc/bGCFcBqYJB6f7GUFqWITMJbY e7ADrEpEoIVR4v2VbrBZzAJnmSUevjjEDFIlLGAp0TLtAQuIzSKgKnHwM0g3BwevgKvE27eu EOvkJE4emww2lFPATeLsrDvMEPHHbBKNrwUhbBeJvuZeFghbWOLV8S1Qp8pIXJ7czQKyV0Jg MqPEhpsfoJztjBJrj51ghaiyljh8/CKYzSzAJzFp23RmkCMkBHglOtqEIEwPiUmXVSGqHSW6 l/yGev8ko8SDNU+ZJzBKL2BkWMUoklpanJueWmyoV5yYW1yal66XnJ+7iRGYFk7/O/5+B+PT 5pBDjAIcjEo8vDdm3IoUYk0sK67MPcQowcGsJMK7zPx2pBBvSmJlVWpRfnxRaU5q8SFGaQ4W JXFe26i2SCGB9MSS1OzU1ILUIpgsEwenVANjCEudQ+kJu6u6nWa5ITbhnspTHTfNd5eWy/QX aWu/dHM+X9cBAWuDzILSl9sMZJYbc7O9XbXwW4HFVY4fBedebj43fZHyxstPCnQ8RDe2n8gR XzL7J/NfW1NVBfPS+7LLz6+NKzn5y45fK06Yp9tpT+OuBmnm3YHML/mOdRQv+/iA+fLtAxOU WIozEg21mIuKEwFYnCu9BwMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJLMWRmVeSWpSXmKPExsVy+t/xa7p/U25HGtx+ymYx62U7i8XGGetZ LY61PWG3mH/kHKtF8+L1bBb9j18zW1x42sNmcf78BnaLTY+vsVrMOL+PyWLRslZmi0NT9zJa rD1yl91i6fWLTBate4+wO/B7rJm3htHj8rWLzB6bVnWyeeyfu4bdY/OSeo++LasYPY7f2M7k 8XmTXABHFJdNSmpOZllqkb5dAlfG8+uJBcfFKyY//sfYwDhVuIuRk0NCwETiw59vjBC2mMSF e+vZuhi5OIQEljBKvLvayQjhNDFJbF7YwwZSxSZgLLH3YAdYQkSghVGi8+IWMIdZ4DyzRMuX BWCzhAUsJVqmPWABsVkEVCUOfu5l7WLk4OAVcJV4+9YVYp2cxMljk1lBbE4BN4mzs+4wg9hC AqUSb6Z/Z5rAyLuAkWEVo0hqaXFuem6xkV5xYm5xaV66XnJ+7iZGYABvO/Zzyw7GrnfBhxgF OBiVeHgbpt2KFGJNLCuuzD3EKMHBrCTCu8z8dqQQb0piZVVqUX58UWlOavEhRmkOFiVx3t49 qyOFBNITS1KzU1MLUotgskwcnFINjEv7arzV3nE/OXz0erXD3PMPrngqL19zsrAox1P/p61T QWiYrpiH8hF9vpCeU29v/znyeePjNSU7Gq3tGC8symTaIC91ZmLgprUxz29e3dt4WofHOc+k 1FAwyvy8GP/tt6sDMjlftmm5W/3qvbNElc1T7XjUzfeaOxOmTTMKW/NlSa/SrDtO7EosxRmJ hlrMRcWJAO884hpcAgAA X-CMS-MailID: 20171009120101eucas1p1c79faf4b39df7f9ff622404a15922875 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?UTF-8?B?QW5kcnplaiBQaWV0cmFzaWV3aWN6G1NSUE9MLUtlcm5lbCAo?= =?UTF-8?B?VFApG+yCvOyEseyghOyekBtTZW5pb3IgU29mdHdhcmUgRW5naW5lZXI=?= X-Global-Sender: =?UTF-8?B?QW5kcnplaiBUb21hc3ogUGlldHJhc2lld2ljehtTUlBPTC1L?= =?UTF-8?B?ZXJuZWwgKFRQKRtTYW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2Fy?= =?UTF-8?B?ZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-CMS-RootMailID: 20171009120101eucas1p1c79faf4b39df7f9ff622404a15922875 X-RootMTR: 20171009120101eucas1p1c79faf4b39df7f9ff622404a15922875 References: <6de8a17a-745b-0fa2-c39d-cdeb28fc9489@ti.com> <1507550451-21324-1-git-send-email-andrzej.p@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some quirky UDCs (like dwc3 on Exynos) need to have their phys calibrated e.g. for using super speed. This patch adds a new phy_calibrate() method. When the calibration should be used is dependent on actual chip. In case of dwc3 on Exynos the calibration must happen after usb_add_hcd() (while in host mode), because certain phy parameters like Tx LOS levels and boost levels need to be calibrated further post initialization of xHCI controller, to get SuperSpeed operations working. But an hcd must be prepared first in order to pass it to usb_add_hcd(), so, in particular, dwc3 registers must be available first, and in order for the latter to happen the phys must be initialized. This poses a chicken and egg problem if the calibration were to be performed in phy_init(). To break the circular dependency a separate method is added which can be called at a desired moment after phy intialization. Signed-off-by: Andrzej Pietrasiewicz --- drivers/phy/phy-core.c | 15 +++++++++++++++ include/linux/phy/phy.h | 10 ++++++++++ 2 files changed, 25 insertions(+) diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c index a268f4d..b4964b0 100644 --- a/drivers/phy/phy-core.c +++ b/drivers/phy/phy-core.c @@ -372,6 +372,21 @@ int phy_reset(struct phy *phy) } EXPORT_SYMBOL_GPL(phy_reset); +int phy_calibrate(struct phy *phy) +{ + int ret; + + if (!phy || !phy->ops->calibrate) + return 0; + + mutex_lock(&phy->mutex); + ret = phy->ops->calibrate(phy); + mutex_unlock(&phy->mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(phy_calibrate); + /** * _of_phy_get() - lookup and obtain a reference to a phy by phandle * @np: device_node for which to get the phy diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index e694d40..87580c8 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -39,6 +39,7 @@ enum phy_mode { * @power_off: powering off the phy * @set_mode: set the mode of the phy * @reset: resetting the phy + * @calibrate: calibrate the phy * @owner: the module owner containing the ops */ struct phy_ops { @@ -48,6 +49,7 @@ struct phy_ops { int (*power_off)(struct phy *phy); int (*set_mode)(struct phy *phy, enum phy_mode mode); int (*reset)(struct phy *phy); + int (*calibrate)(struct phy *phy); struct module *owner; }; @@ -141,6 +143,7 @@ static inline void *phy_get_drvdata(struct phy *phy) int phy_power_off(struct phy *phy); int phy_set_mode(struct phy *phy, enum phy_mode mode); int phy_reset(struct phy *phy); +int phy_calibrate(struct phy *phy); static inline int phy_get_bus_width(struct phy *phy) { return phy->attrs.bus_width; @@ -262,6 +265,13 @@ static inline int phy_reset(struct phy *phy) return -ENOSYS; } +static inline int phy_calibrate(struct phy *phy) +{ + if (!phy) + return 0; + return -ENOSYS; +} + static inline int phy_get_bus_width(struct phy *phy) { return -ENOSYS;