diff mbox

[2/2] iio: adc: exynos_adc: Add support for S3C24xx ADC

Message ID 175757227.TPQdXAQiJt@diego (mailing list archive)
State New, archived
Headers show

Commit Message

Heiko Stuebner July 22, 2014, 10:44 a.m. UTC
Am Dienstag, 22. Juli 2014, 10:39:38 schrieb Arnd Bergmann:
> On Tuesday 22 July 2014 11:11:14 Chanwoo Choi wrote:
> > This patch add support for s3c2410/s3c2416/s3c2440/s3c2443 ADC. The
> > s3c24xx
> > is alomost same as ADCv1. But, There are a little difference as following:
> > - ADCMUX register address to select channel
> > - ADCDAT mask (10bit or 12bit ADC resolution according to SoC version)
> 
> Very good, thanks for doing this patch!
> 
> (adding Heiko to Cc, he's probably interested in seeing this as well.

indeed. Thanks for implementing this.

While trying to build a test setup for this, I noticed two points:

(1) I'm not sure what the second register (a "phy enable register" according
to the binding) is supposed to be.
According to binding and adc code it is mandatory, but I didn't find any
lone adc register in the s3c2416 manual.


(2) You might need something along the lines of:



Thanks
Heiko

> 
> One comment:
> > @@ -101,12 +107,14 @@ struct exynos_adc {
> > 
> >  	struct completion	completion;
> >  	
> >  	u32			value;
> > 
> > +	u32			value2;
> > 
> >  	unsigned int            version;
> >  
> >  };
> > 
> > ...
> > @@ -365,7 +448,7 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
> > 
> >  		ret = -ETIMEDOUT;
> >  	
> >  	} else {
> >  	
> >  		*val = info->value;
> > 
> > -		*val2 = 0;
> > +		*val2 = info->value2;
> > 
> >  		ret = IIO_VAL_INT;
> >  	
> >  	}
> > 
> > @@ -377,9 +460,11 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
> > 
> >  static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
> >  {
> >  
> >  	struct exynos_adc *info = (struct exynos_adc *)dev_id;
> > 
> > +	u32 mask = info->data->mask;
> > 
> >  	/* Read value */
> > 
> > -	info->value = readl(ADC_V1_DATX(info->regs)) & ADC_DATX_MASK;
> > +	info->value = readl(ADC_V1_DATX(info->regs)) & mask;
> > +	info->value2 = readl(ADC_V1_DATY(info->regs)) & mask;
> > 
> >  	/* clear irq */
> >  	if (info->data->clear_irq)
> 
> If I understand it right, this would only be necessary if we want
> to do the touchscreen driver as a separate iio client using the
> in-kernel interfaces. As Jonathan Cameron commented, we probably
> don't want to do that though. Even if we do, it should be a separate
> patch and not mixed in with the s3c24xx support.
> 
> Aside from this:
> 
> Acked-by: Arnd Bergmann <arnd@arndb.de>
> 
> 	Arnd

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Comments

Chanwoo Choi July 28, 2014, 12:08 p.m. UTC | #1
On 07/22/2014 07:44 PM, Heiko Stübner wrote:
> Am Dienstag, 22. Juli 2014, 10:39:38 schrieb Arnd Bergmann:
>> On Tuesday 22 July 2014 11:11:14 Chanwoo Choi wrote:
>>> This patch add support for s3c2410/s3c2416/s3c2440/s3c2443 ADC. The
>>> s3c24xx
>>> is alomost same as ADCv1. But, There are a little difference as following:
>>> - ADCMUX register address to select channel
>>> - ADCDAT mask (10bit or 12bit ADC resolution according to SoC version)
>>
>> Very good, thanks for doing this patch!
>>
>> (adding Heiko to Cc, he's probably interested in seeing this as well.
> 
> indeed. Thanks for implementing this.
> 
> While trying to build a test setup for this, I noticed two points:
> 
> (1) I'm not sure what the second register (a "phy enable register" according
> to the binding) is supposed to be.
> According to binding and adc code it is mandatory, but I didn't find any
> lone adc register in the s3c2416 manual.

You're right. I don't find ADC_PHY_CONTROL register on s3c2410 datasheet.
So, if 'needs_adc_phy' field is true, exynos-adc would only get 'phy enable register'
from dt node.

-       mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-       info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
-       if (IS_ERR(info->enable_reg))
-               return PTR_ERR(info->enable_reg);
+
+       if (info->data->needs_adc_phy) {
+               mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+               info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
+               if (IS_ERR(info->enable_reg))
+                       return PTR_ERR(info->enable_reg);
+       }


> 
> 
> (2) You might need something along the lines of:
> 
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 11b048a..088c99a 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -129,7 +129,7 @@ config AT91_ADC
>  
>  config EXYNOS_ADC
>         tristate "Exynos ADC driver support"
> -       depends on ARCH_EXYNOS || (OF && COMPILE_TEST)
> +       depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF && COMPILE_TEST)
>         help
>           Core support for the ADC block found in the Samsung EXYNOS series
>           of SoCs for drivers such as the touchscreen and hwmon to use to share

OK, I'll modify it as your comment.

Best Regards,
Chanwoo Choi

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diff mbox

Patch

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 11b048a..088c99a 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -129,7 +129,7 @@  config AT91_ADC
 
 config EXYNOS_ADC
        tristate "Exynos ADC driver support"
-       depends on ARCH_EXYNOS || (OF && COMPILE_TEST)
+       depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF && COMPILE_TEST)
        help
          Core support for the ADC block found in the Samsung EXYNOS series
          of SoCs for drivers such as the touchscreen and hwmon to use to share