From patchwork Wed Sep 18 19:19:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 2908941 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6CA8D9F1BF for ; Wed, 18 Sep 2013 19:19:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7E44E2013A for ; Wed, 18 Sep 2013 19:19:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2884320138 for ; Wed, 18 Sep 2013 19:19:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753304Ab3IRTTL (ORCPT ); Wed, 18 Sep 2013 15:19:11 -0400 Received: from gloria.sntech.de ([95.129.55.99]:58041 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751047Ab3IRTTK (ORCPT ); Wed, 18 Sep 2013 15:19:10 -0400 Received: from ip545477c2.speed.planet.nl ([84.84.119.194] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1VMNHB-0008Sn-QY; Wed, 18 Sep 2013 21:19:01 +0200 From: Heiko =?utf-8?q?St=C3=BCbner?= To: kgene.kim@samsung.com Subject: [PATCH v5 1/4] ARM: S3C24XX: number the dma clocks Date: Wed, 18 Sep 2013 21:19:17 +0200 User-Agent: KMail/1.13.7 (Linux/3.2.0-2-amd64; KDE/4.8.4; x86_64; ; ) Cc: Dan Williams , Vinod Koul , linus.walleij@linaro.org, Tomasz Figa , Sylwester Nawrocki , linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org References: <201309182118.28391.heiko@sntech.de> In-Reply-To: <201309182118.28391.heiko@sntech.de> MIME-Version: 1.0 Message-Id: <201309182119.17617.heiko@sntech.de> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Each dma channel has its own clock. The upcoming dma driver wants to handle these itself and therefore needs to be able to get the correct clock for a channel. Therefore rename the dma clocks to "dma.X" for s3c2412, s3c2416 and s3c2443. This does not change the behaviour for the old dma driver at all, as all dma clocks are still always on and not handled by the old dma driver at all. Signed-off-by: Heiko Stuebner Acked-by: Linus Walleij --- changes since v2: - remove noise from commit message arch/arm/mach-s3c24xx/clock-s3c2412.c | 8 ++++---- arch/arm/mach-s3c24xx/common-s3c2443.c | 12 ++++++------ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-s3c24xx/clock-s3c2412.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c index d8f253f..11b3b28 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2412.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2412.c @@ -484,22 +484,22 @@ static struct clk init_clocks_disable[] = { static struct clk init_clocks[] = { { - .name = "dma", + .name = "dma.0", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA0, }, { - .name = "dma", + .name = "dma.1", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA1, }, { - .name = "dma", + .name = "dma.2", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA2, }, { - .name = "dma", + .name = "dma.3", .parent = &clk_h, .enable = s3c2412_clkcon_enable, .ctrlbit = S3C2412_CLKCON_DMA3, diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c index f6b9f2e..65d3eef 100644 --- a/arch/arm/mach-s3c24xx/common-s3c2443.c +++ b/arch/arm/mach-s3c24xx/common-s3c2443.c @@ -438,32 +438,32 @@ static struct clk init_clocks_off[] = { static struct clk init_clocks[] = { { - .name = "dma", + .name = "dma.0", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA0, }, { - .name = "dma", + .name = "dma.1", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA1, }, { - .name = "dma", + .name = "dma.2", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA2, }, { - .name = "dma", + .name = "dma.3", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA3, }, { - .name = "dma", + .name = "dma.4", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA4, }, { - .name = "dma", + .name = "dma.5", .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_DMA5,