From patchwork Thu Aug 28 23:30:06 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 4808251 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 09487C0338 for ; Thu, 28 Aug 2014 23:31:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 71F692011E for ; Thu, 28 Aug 2014 23:30:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7086920122 for ; Thu, 28 Aug 2014 23:30:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751619AbaH1Xa5 (ORCPT ); Thu, 28 Aug 2014 19:30:57 -0400 Received: from kirsty.vergenet.net ([202.4.237.240]:45519 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750773AbaH1Xa5 (ORCPT ); Thu, 28 Aug 2014 19:30:57 -0400 Received: from penelope.isobedori.kobe.vergenet.net (g1-27-253-251-11.bmobile.ne.jp [27.253.251.11]) by kirsty.vergenet.net (Postfix) with ESMTP id B038C266CED; Fri, 29 Aug 2014 09:30:53 +1000 (EST) Received: by penelope.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 91C1A7C026E; Fri, 29 Aug 2014 08:30:06 +0900 (JST) Date: Fri, 29 Aug 2014 08:30:06 +0900 From: Simon Horman To: Olof Johansson Cc: Rob Herring , Mark Rutland , Marc Zyngier , Naveen Krishna Chatradhi , Catalin Marinas , "naveenkrishna.ch@gmail.com" , "linux-arm-kernel@lists.infradead.org" , "linux-samsung-soc@vger.kernel.org" , "devicetree@vger.kernel.org" , "cpgs@samsung.com" , Thomas Abraham , Benjamin Herrenschmidt Subject: Re: [PATCH 11/14] arm64: dts: Add initial device tree support for EXYNOS7 Message-ID: <20140828233006.GC16165@verge.net.au> References: <1409132660-1898-1-git-send-email-ch.naveen@samsung.com> <1409132660-1898-3-git-send-email-ch.naveen@samsung.com> <20140828035639.GB4972@localhost> <20140828094846.GD14650@leverpostej> <20140828170306.GQ14650@leverpostej> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Organisation: Horms Solutions Ltd. User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Aug 28, 2014 at 03:23:49PM -0700, Olof Johansson wrote: > On Thu, Aug 28, 2014 at 10:54 AM, Rob Herring wrote: > > On Thu, Aug 28, 2014 at 12:19 PM, Olof Johansson wrote: > >> On Thu, Aug 28, 2014 at 10:03 AM, Mark Rutland wrote: > >>> On Thu, Aug 28, 2014 at 05:28:22PM +0100, Olof Johansson wrote: > >>>> On Thu, Aug 28, 2014 at 2:48 AM, Mark Rutland wrote: > >>>> > Hi, > >>>> > > >>>> >> > + cpus { > >>>> >> > + #address-cells = <2>; > >>>> >> > + #size-cells = <0>; > >>>> >> > >>>> >> Why size-cells=2? Can you not fit a cpuid in 32 bits? > >>>> > > >>>> > As of commit 72aea393a2e7 (arm64: smp: honour #address-size when parsing > >>>> > CPU reg property) Linux can handle single-cell cpu node reg entries > >>>> > where /cpus/#address-cells = <1>. > >>>> > > >>>> > I can't make any guarantees about other code (e.g. bootloaders) which > >>>> > might try to do things with cpu nodes, YMMV. > >>>> > >>>> Ok. If address-cells is kept at 2 the unit address needs to be changed > >>>> to "0,0". So one or the other has to be changed. > >>> > >>> I'm happy either way. > >>> > >>> I'm not sure the rest of the tree had "0," prefixes on all of the > >>> unit-addresses for 64-bit addresses that were under 4GB, and I'm not > >>> sure that existing dts consistently do that either. > >>> > >>> Do we want to enforce that for all 64-bit unit-addresses? > >> > >> Yeah, I believe that's the only valid format for a 2-address-cell unit address. > > > > But we don't do leading 0's anywhere else like single cell unit > > addresses. Buses expressed with ranges and offsets are one example. > > Also, I2C addresses have a 32-bit size in DT yet are only 8-bit and we > > don't do leading zero's there. > > Ok, I'm happily proven wrong here, also by confirming how this is done > on "real" OF. > > According to benh: > > 15:20 ojn: 0,0 is not quite right, it's supposed to be used > when the two numbers are different things, like device,fn on PCI > > The same is true for >2^32 unit addresses, they just use the one > integer instead of x,y. > > So, I take back all I've said on this in the last 72 hours. :) It > looks like we might need to revisit some of the 32-bit DTs. Simon, > drop the series you had. :) Thanks will do. Is the way forward for me to apply my original patch to change memory@180000000 to memory@140000000? And abandon all the ',' only changes?This one: This is the original patch: From: Simon Horman [PATCH] ARM: shmobile: lager: correct memory map The base address of the second memory region on the lager board is 0x140000000. Update the tag used in the dts file accordingly. This is a documentation fix and should have no run-time affect. This problem was introduced when the second memory region was added to the lager dts file by 62bc32a2573c4219 ("ARM: shmobile: Include all 4 GiB of memory on Lager)" in v3.14. Reported-by: NAOYA SHIIBA Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 0118cbf..84dcafa 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -32,7 +32,7 @@ reg = <0 0x40000000 0 0x40000000>; }; - memory@180000000 { + memory@140000000 { device_type = "memory"; reg = <1 0x40000000 0 0xc0000000>; };