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Fri, 29 Sep 2017 10:05:49 +0000 (GMT) X-AuditID: cbfec7ef-f79ee6d000003120-ab-59ce1afd521b Received: from eusync4.samsung.com ( [203.254.199.214]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 48.27.18832.DFA1EC95; Fri, 29 Sep 2017 11:05:49 +0100 (BST) Received: from AMDC2768.DIGITAL.local ([106.120.43.17]) by eusync4.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OX100L2HDDLSN30@eusync4.samsung.com>; Fri, 29 Sep 2017 11:05:49 +0100 (BST) From: Andrzej Hajda To: Inki Dae Cc: Andrzej Hajda , Bartlomiej Zolnierkiewicz , Marek Szyprowski , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, Tobias Jakobi , Daniel Drake Subject: [PATCH v2 08/11] drm/exynos/mixer: pass actual mode on MIXER to encoder Date: Fri, 29 Sep 2017 12:05:39 +0200 Message-id: <20170929100542.12849-9-a.hajda@samsung.com> X-Mailer: git-send-email 2.14.1 In-reply-to: <20170929100542.12849-1-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrEIsWRmVeSWpSXmKPExsWy7djP87p/pc5FGpw6o2hxa905VouNM9az Wjya/5jZ4srX92wWk+5PYLGYcX4fk8XaI3fZLdpWf2B14PBY9D3L4373cSaPf8fYPfq2rGL0 +LxJLoA1issmJTUnsyy1SN8ugStj99WrzAW7VSpOzLnO1MDYKNfFyMkhIWAi8eP6PiYIW0zi wr31bF2MXBxCAssYJW5e3cwM4XxmlNizcg8zTMf+tinscFVLlrRCOf8ZJVZdm8ACUsUmoCnx d/NNNhBbREBZYtW+drAiZoFlTBIHbu5iBUkICwRJzJlwFmw5i4CqxPx124GKODh4BSwkeh5W QGyTlzj34DbYZk4BS4nFk79A3TqFTaLpLQeE7SLx7v0XVghbWOLV8S3sELaMRGfHQSaQvRIC 3YwSn/pPsEM4Uxgl/n2YAfWPtcTh4xfBupkF+CQmbZvODHKEhACvREebEESJh8T3661QCxwl VvYcY4T4uIdRYvnEp6wTGKUXMDKsYhRJLS3OTU8tNtQrTswtLs1L10vOz93ECIzZ0/+Ov9/B +LQ55BCjAAejEg/vDbmzkUKsiWXFlbmHGCU4mJVEeJ9wnosU4k1JrKxKLcqPLyrNSS0+xCjN waIkzmsb1RYpJJCeWJKanZpakFoEk2Xi4JRqYNS4dHLfhA2yVkl++14c3H3kZtaULeyuHnfV C+rvqk3vmFmimmrE4TI14YjwtXrnBRMeWv5Qrxbt2f3QxdPv774+l8596nyrpmVWmT9nDf4/ f/XnZyatBn/fSf6+YJpUz/i47vCTHQe0xKUW/XglyBmmdlNTrDG26Ni1QztbQ19ynp9aFpIc uVeJpTgj0VCLuag4EQCECO511QIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKLMWRmVeSWpSXmKPExsVy+t/xa7p/pc5FGlw8yGZxa905VouNM9az Wjya/5jZ4srX92wWk+5PYLGYcX4fk8XaI3fZLdpWf2B14PBY9D3L4373cSaPf8fYPfq2rGL0 +LxJLoA1issmJTUnsyy1SN8ugStj99WrzAW7VSpOzLnO1MDYKNfFyMkhIWAisb9tCjuELSZx 4d56NhBbSGAJo8TqNtsuRi4gu5FJYtXGmcwgCTYBTYm/m2+CFYkIKEus2tfODlLELLCKSWJW Wy9YQlggQGLynjlgDSwCqhLz120HKuLg4BWwkOh5WAGxTF7i3IPbYCWcApYSiyd/YYJYbCGx aOF61gmMvAsYGVYxiqSWFuem5xYb6hUn5haX5qXrJefnbmIEBta2Yz8372C8tDH4EKMAB6MS D+8NubORQqyJZcWVuYcYJTiYlUR4n3CeixTiTUmsrEotyo8vKs1JLT7EKM3BoiTO27tndaSQ QHpiSWp2ampBahFMlomDU6qBsUH60ok7a+IKK8T/a3G+3aqgvsA+4K1U77Gaxsz/pc5iXNnL Xb3nz/j7MvXS6R3/gsN/7zuwT1Omb0WDnPIrZunrRYLyOz5u/fW5yNie8caXey8TvcTEljf1 6Ujmf1d+trJ3od/6Q4wq1zafm38/6pbthXUr5b7qrzhf2Jht73dtw5EdQp/KI5VYijMSDbWY i4oTAaZyQvYoAgAA X-CMS-MailID: 20170929100549eucas1p2eddc8a5e6908a69c9c91be488906852f X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRvsgrw=?= =?UTF-8?B?7ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?QW5kcnplaiBIYWpkYRtTUlBPTC1LZXJuZWwgKFRQKRtTYW1z?= =?UTF-8?B?dW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-CMS-RootMailID: 20170929100549eucas1p2eddc8a5e6908a69c9c91be488906852f X-RootMTR: 20170929100549eucas1p2eddc8a5e6908a69c9c91be488906852f References: <20170929100542.12849-1-a.hajda@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP MIXER in SoCs prior to Exynos5420 supports only 4 video modes: 720x480, 720x576, 1280x720, 1920x1080. Support for other modes can be enabled by manipulating timings of HDMI. To allow it MIXER must pass actual video mode to HDMI, the proper way to do it is to modify adjusted_mode property in crtc::mode_fixup callback. Adding such callback allows also to simplify mixer_cfg_scan code - choosing mode is performed already in crtc::mode_fixup. mode_fixup is also better place to check interlace flag. Signed-off-by: Andrzej Hajda Reviewed-by: Tobias Jakobi --- drivers/gpu/drm/exynos/exynos_mixer.c | 70 +++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 2d8905ea0141..8baa93f80106 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -115,6 +115,7 @@ struct mixer_context { struct clk *sclk_hdmi; struct clk *mout_mixer; enum mixer_version_id mxr_ver; + int scan_value; }; struct mixer_drv_data { @@ -367,23 +368,11 @@ static void mixer_cfg_scan(struct mixer_context *ctx, int width, int height) val = test_bit(MXR_BIT_INTERLACE, &ctx->flags) ? MXR_CFG_SCAN_INTERLACE : MXR_CFG_SCAN_PROGRESSIVE; - /* setup display size */ - if (ctx->mxr_ver == MXR_VER_128_0_0_184) { + if (ctx->mxr_ver == MXR_VER_128_0_0_184) mixer_reg_write(ctx, MXR_RESOLUTION, MXR_MXR_RES_HEIGHT(height) | MXR_MXR_RES_WIDTH(width)); - } else { - /* choosing between proper HD and SD mode */ - if (height <= 480) - val |= MXR_CFG_SCAN_NTSC | MXR_CFG_SCAN_SD; - else if (height <= 576) - val |= MXR_CFG_SCAN_PAL | MXR_CFG_SCAN_SD; - else if (height <= 720) - val |= MXR_CFG_SCAN_HD_720 | MXR_CFG_SCAN_HD; - else if (height <= 1080) - val |= MXR_CFG_SCAN_HD_1080 | MXR_CFG_SCAN_HD; - else - val |= MXR_CFG_SCAN_HD_720 | MXR_CFG_SCAN_HD; - } + else + val |= ctx->scan_value; mixer_reg_writemask(ctx, MXR_CFG, val, MXR_CFG_SCAN_MASK); } @@ -467,11 +456,6 @@ static void mixer_commit(struct mixer_context *ctx) { struct drm_display_mode *mode = &ctx->crtc->base.state->adjusted_mode; - if (mode->flags & DRM_MODE_FLAG_INTERLACE) - __set_bit(MXR_BIT_INTERLACE, &ctx->flags); - else - __clear_bit(MXR_BIT_INTERLACE, &ctx->flags); - mixer_cfg_scan(ctx, mode->hdisplay, mode->vdisplay); mixer_cfg_rgb_fmt(ctx, mode->vdisplay); mixer_run(ctx); @@ -1033,6 +1017,51 @@ static int mixer_mode_valid(struct exynos_drm_crtc *crtc, return MODE_BAD; } +static bool mixer_mode_fixup(struct exynos_drm_crtc *crtc, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct mixer_context *ctx = crtc->ctx; + int width = mode->hdisplay, height = mode->vdisplay, i; + + struct { + int hdisplay, vdisplay, htotal, vtotal, scan_val; + } static const modes[] = { + { 720, 480, 858, 525, MXR_CFG_SCAN_NTSC | MXR_CFG_SCAN_SD }, + { 720, 576, 864, 625, MXR_CFG_SCAN_PAL | MXR_CFG_SCAN_SD }, + { 1280, 720, 1650, 750, MXR_CFG_SCAN_HD_720 | MXR_CFG_SCAN_HD }, + { 1920, 1080, 2200, 1125, MXR_CFG_SCAN_HD_1080 | MXR_CFG_SCAN_HD } + }; + + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + __set_bit(MXR_BIT_INTERLACE, &ctx->flags); + else + __clear_bit(MXR_BIT_INTERLACE, &ctx->flags); + + if (ctx->mxr_ver == MXR_VER_128_0_0_184) + return true; + + for (i = 0; i < ARRAY_SIZE(modes); ++i) + if (width <= modes[i].hdisplay && height <= modes[i].vdisplay) { + ctx->scan_value = modes[i].scan_val; + if (width < modes[i].hdisplay || + height < modes[i].vdisplay) { + adjusted_mode->hdisplay = modes[i].hdisplay; + adjusted_mode->hsync_start = modes[i].hdisplay; + adjusted_mode->hsync_end = modes[i].htotal; + adjusted_mode->htotal = modes[i].htotal; + adjusted_mode->vdisplay = modes[i].vdisplay; + adjusted_mode->vsync_start = modes[i].vdisplay; + adjusted_mode->vsync_end = modes[i].vtotal; + adjusted_mode->vtotal = modes[i].vtotal; + } + + return true; + } + + return false; +} + static const struct exynos_drm_crtc_ops mixer_crtc_ops = { .enable = mixer_enable, .disable = mixer_disable, @@ -1043,6 +1072,7 @@ static const struct exynos_drm_crtc_ops mixer_crtc_ops = { .disable_plane = mixer_disable_plane, .atomic_flush = mixer_atomic_flush, .mode_valid = mixer_mode_valid, + .mode_fixup = mixer_mode_fixup, }; static const struct mixer_drv_data exynos5420_mxr_drv_data = {