| Message ID | 20181129155134.19141-2-k.konieczny@partner.samsung.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | Add imem clock for Exynos 5433 | expand |
Hi, On 2018년 11월 30일 00:51, Kamil Konieczny wrote: > Fix typo in imem clock divider 200 switched with 266. > > Fixes: 5785d6e61f27 ("clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains") > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- > drivers/clk/samsung/clk-exynos5433.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c > index 751e2c4fb65b..ea47f49abc7f 100644 > --- a/drivers/clk/samsung/clk-exynos5433.c > +++ b/drivers/clk/samsung/clk-exynos5433.c > @@ -568,10 +568,10 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { > GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400", > ENABLE_ACLK_TOP, 25, > CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), > - GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266", > + GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200", > ENABLE_ACLK_TOP, 24, > CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), > - GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_200", > + GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266", > ENABLE_ACLK_TOP, 23, > CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), > GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b", > Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 751e2c4fb65b..ea47f49abc7f 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -568,10 +568,10 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400", ENABLE_ACLK_TOP, 25, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266", + GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200", ENABLE_ACLK_TOP, 24, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_200", + GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266", ENABLE_ACLK_TOP, 23, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b",
Fix typo in imem clock divider 200 switched with 266. Fixes: 5785d6e61f27 ("clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains") Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- drivers/clk/samsung/clk-exynos5433.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)