diff mbox series

[05/23] drm/exynos/decon5433: embed exynos_drm_crtc directly into context

Message ID 20190301122055.7135-6-a.hajda@samsung.com (mailing list archive)
State Not Applicable
Headers show
Series drm/exynos: add support for GSCALER planes on Exynos5433 | expand

Commit Message

Andrzej Hajda March 1, 2019, 12:20 p.m. UTC
Since crtc maps 1:1 to the device there is no point in allocating it
separately, another benefit is possibility of direct initialisation
of its fields which is more readable and allows further expansion.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
---
 drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 52 +++++++++----------
 1 file changed, 26 insertions(+), 26 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index ae0f475eb633..0d409f453923 100644
--- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
@@ -54,7 +54,7 @@  static const char * const decon_clks_name[] = {
 struct decon_context {
 	struct device			*dev;
 	struct drm_device		*drm_dev;
-	struct exynos_drm_crtc		*crtc;
+	struct exynos_drm_crtc		crtc;
 	struct exynos_drm_plane		planes[WINDOWS_NR];
 	void __iomem			*addr;
 	struct regmap			*sysreg;
@@ -69,6 +69,8 @@  struct decon_context {
 	u32				frame_id;
 };
 
+#define to_decon(ptr) container_of(ptr, struct decon_context, ptr)
+
 static const uint32_t decon_formats[] = {
 	DRM_FORMAT_XRGB1555,
 	DRM_FORMAT_RGB565,
@@ -90,7 +92,7 @@  static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,
 
 static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 	u32 val;
 
 	val = VIDINTCON0_INTEN;
@@ -110,7 +112,7 @@  static int decon_enable_vblank(struct exynos_drm_crtc *crtc)
 
 static void decon_disable_vblank(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 
 	if (!(ctx->out_type & I80_HW_TRG))
 		disable_irq_nosync(ctx->te_irq);
@@ -143,7 +145,7 @@  static u32 decon_get_frame_count(struct decon_context *ctx, bool end)
 
 	switch (status & (VIDCON1_VSTATUS_MASK | VIDCON1_I80_ACTIVE)) {
 	case VIDCON1_VSTATUS_VS:
-		if (!(ctx->crtc->i80_mode))
+		if (!(ctx->crtc.i80_mode))
 			--frm;
 		break;
 	case VIDCON1_VSTATUS_BP:
@@ -163,7 +165,7 @@  static u32 decon_get_frame_count(struct decon_context *ctx, bool end)
 
 static void decon_setup_trigger(struct decon_context *ctx)
 {
-	if (!ctx->crtc->i80_mode && !(ctx->out_type & I80_HW_TRG))
+	if (!ctx->crtc.i80_mode && !(ctx->out_type & I80_HW_TRG))
 		return;
 
 	if (!(ctx->out_type & I80_HW_TRG)) {
@@ -183,7 +185,7 @@  static void decon_setup_trigger(struct decon_context *ctx)
 
 static void decon_commit(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 	struct drm_display_mode *m = &crtc->base.mode;
 	bool interlaced = false;
 	u32 val;
@@ -377,7 +379,7 @@  static void decon_shadow_protect(struct decon_context *ctx, bool protect)
 
 static void decon_atomic_begin(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 
 	decon_shadow_protect(ctx, true);
 }
@@ -391,7 +393,7 @@  static void decon_update_plane(struct exynos_drm_crtc *crtc,
 {
 	struct exynos_drm_plane_state *state =
 				to_exynos_plane_state(plane->base.state);
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 	struct drm_framebuffer *fb = state->base.fb;
 	unsigned int win = state->base.normalized_zpos + ctx->first_win;
 	unsigned int cpp = fb->format->cpp[0];
@@ -445,7 +447,7 @@  static void decon_update_plane(struct exynos_drm_crtc *crtc,
 
 static void decon_atomic_flush(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 	unsigned long flags;
 	int win = hweight32(crtc->base.state->plane_mask) + ctx->first_win;
 
@@ -502,7 +504,7 @@  static void decon_swreset(struct decon_context *ctx)
 
 static void decon_enable(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 
 	pm_runtime_get_sync(ctx->dev);
 
@@ -510,12 +512,12 @@  static void decon_enable(struct exynos_drm_crtc *crtc)
 
 	decon_swreset(ctx);
 
-	decon_commit(ctx->crtc);
+	decon_commit(&ctx->crtc);
 }
 
 static void decon_disable(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 	int i;
 
 	if (!(ctx->out_type & I80_HW_TRG))
@@ -548,7 +550,7 @@  static irqreturn_t decon_te_irq_handler(int irq, void *dev_id)
 
 static void decon_clear_channels(struct exynos_drm_crtc *crtc)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 	int win, i, ret;
 
 	DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -577,7 +579,7 @@  static void decon_clear_channels(struct exynos_drm_crtc *crtc)
 static enum drm_mode_status decon_mode_valid(struct exynos_drm_crtc *crtc,
 		const struct drm_display_mode *mode)
 {
-	struct decon_context *ctx = crtc->ctx;
+	struct decon_context *ctx = to_decon(crtc);
 
 	ctx->irq = crtc->i80_mode ? ctx->irq_lcd_sys : ctx->irq_vsync;
 
@@ -605,8 +607,6 @@  static int decon_bind(struct device *dev, struct device *master, void *data)
 {
 	struct decon_context *ctx = dev_get_drvdata(dev);
 	struct drm_device *drm_dev = data;
-	struct exynos_drm_plane *exynos_plane;
-	enum exynos_drm_output_type out_type;
 	unsigned int i;
 	int ret;
 
@@ -624,15 +624,15 @@  static int decon_bind(struct device *dev, struct device *master, void *data)
 			return ret;
 	}
 
-	exynos_plane = &ctx->planes[PRIMARY_WIN];
-	out_type = (ctx->out_type & IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI
-						  : EXYNOS_DISPLAY_TYPE_LCD;
-	ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,
-			out_type, &decon_crtc_ops, ctx);
-	if (IS_ERR(ctx->crtc))
-		return PTR_ERR(ctx->crtc);
+	ctx->crtc.type = (ctx->out_type & IFTYPE_HDMI)
+		       ? EXYNOS_DISPLAY_TYPE_HDMI : EXYNOS_DISPLAY_TYPE_LCD;
+	ctx->crtc.ops = &decon_crtc_ops;
+	ret = exynos_drm_crtc_init(&ctx->crtc, drm_dev);
+	if (ret)
+		return ret;
+	ctx->crtc.base.primary = &ctx->planes[PRIMARY_WIN].base;
 
-	decon_clear_channels(ctx->crtc);
+	decon_clear_channels(&ctx->crtc);
 
 	return exynos_drm_register_dma(drm_dev, dev);
 }
@@ -641,7 +641,7 @@  static void decon_unbind(struct device *dev, struct device *master, void *data)
 {
 	struct decon_context *ctx = dev_get_drvdata(dev);
 
-	decon_disable(ctx->crtc);
+	decon_disable(&ctx->crtc);
 
 	/* detach this sub driver from iommu mapping if supported. */
 	exynos_drm_unregister_dma(ctx->drm_dev, ctx->dev);
@@ -663,7 +663,7 @@  static void decon_handle_vblank(struct decon_context *ctx)
 	if (frm != ctx->frame_id) {
 		/* handle only if incremented, take care of wrap-around */
 		if ((s32)(frm - ctx->frame_id) > 0)
-			drm_crtc_handle_vblank(&ctx->crtc->base);
+			drm_crtc_handle_vblank(&ctx->crtc.base);
 		ctx->frame_id = frm;
 	}