@@ -30,8 +30,6 @@
#define DSD_CFG_MUX_TE_UNMASK_GLOBAL BIT(13)
#define WINDOWS_NR 5
-#define PRIMARY_WIN 2
-#define CURSON_WIN 4
#define MIN_FB_WIDTH_FOR_16WORD_BURST 128
@@ -625,7 +623,6 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
ret = exynos_drm_crtc_init(&ctx->crtc, drm_dev);
if (ret)
return ret;
- ctx->crtc.base.primary = &ctx->planes[PRIMARY_WIN].base;
decon_clear_channels(&ctx->crtc);
@@ -635,7 +635,6 @@ static int decon_bind(struct device *dev, struct device *master, void *data)
decon_ctx_remove(ctx);
return ret;
}
- ctx->crtc.base.primary = &ctx->planes[DEFAULT_WIN].base;
if (ctx->encoder)
exynos_dpi_bind(drm_dev, ctx->encoder);
@@ -176,9 +176,17 @@ int exynos_drm_crtc_init(struct exynos_drm_crtc *exynos_crtc,
struct drm_device *drm_dev)
{
struct drm_crtc *crtc = &exynos_crtc->base;
+ struct drm_plane *primary = NULL, *plane;
+
+ drm_for_each_plane(plane, drm_dev) {
+ if (plane->possible_crtcs != BIT(drm_dev->mode_config.num_crtc))
+ continue;
+ if (!primary && plane->type == DRM_PLANE_TYPE_PRIMARY)
+ primary = plane;
+ }
drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
- return drm_crtc_init_with_planes(drm_dev, crtc, NULL, NULL,
+ return drm_crtc_init_with_planes(drm_dev, crtc, primary, NULL,
&exynos_crtc_funcs, NULL);
}
@@ -21,8 +21,6 @@
#define MAX_PLANE 5
#define MAX_FB_BUFFER 4
-#define DEFAULT_WIN 0
-
#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base)
#define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base)
@@ -1051,7 +1051,6 @@ static int fimd_bind(struct device *dev, struct device *master, void *data)
ret = exynos_drm_crtc_init(&ctx->crtc, drm_dev);
if (ret)
return ret;
- ctx->crtc.base.primary = &ctx->planes[DEFAULT_WIN].base;
if (ctx->driver_data->has_dp_clk) {
ctx->dp_clk.enable = fimd_dp_clock_enable;
@@ -387,7 +387,6 @@ static int vidi_bind(struct device *dev, struct device *master, void *data)
DRM_ERROR("failed to create crtc.\n");
return ret;
}
- ctx->crtc.base.primary = &ctx->planes[DEFAULT_WIN].base;
drm_encoder_init(drm_dev, encoder, &exynos_vidi_encoder_funcs,
DRM_MODE_ENCODER_TMDS, NULL);
@@ -1179,7 +1179,6 @@ static int mixer_bind(struct device *dev, struct device *manager, void *data)
mixer_ctx_remove(ctx);
goto free_ctx;
}
- ctx->crtc.base.primary = &ctx->planes[DEFAULT_WIN].base;
return 0;
exynos_drm_crtc_init has all information necessary to discover primary plane. Let's move logic for setting primary plane into this function. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 3 --- drivers/gpu/drm/exynos/exynos7_drm_decon.c | 1 - drivers/gpu/drm/exynos/exynos_drm_crtc.c | 10 +++++++++- drivers/gpu/drm/exynos/exynos_drm_drv.h | 2 -- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 1 - drivers/gpu/drm/exynos/exynos_drm_vidi.c | 1 - drivers/gpu/drm/exynos/exynos_mixer.c | 1 - 7 files changed, 9 insertions(+), 10 deletions(-)