From patchwork Fri Jul 19 15:05:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 11050223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 76F1C14DB for ; Fri, 19 Jul 2019 15:06:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6708E205FC for ; Fri, 19 Jul 2019 15:06:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A99F285FB; Fri, 19 Jul 2019 15:06:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4F1792897F for ; Fri, 19 Jul 2019 15:06:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729964AbfGSPGA (ORCPT ); Fri, 19 Jul 2019 11:06:00 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:51719 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729950AbfGSPF7 (ORCPT ); Fri, 19 Jul 2019 11:05:59 -0400 Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20190719150557euoutp01cd3c8caba4079d904928b0f6567119f6~y10_n8LZe1670816708euoutp01T for ; Fri, 19 Jul 2019 15:05:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.w1.samsung.com 20190719150557euoutp01cd3c8caba4079d904928b0f6567119f6~y10_n8LZe1670816708euoutp01T DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1563548757; bh=MPIjTyHieD2gGpsaXd2KwE9jDzTxd4a6XuBnBOBEIew=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iphJQAkL6ShbtQFQn2ls3kUUos3F3CCkMLPtaqThIz/LVPafW+AOn83MldnbLymDl 5twXjXVI+sTalc6ValX/5NNtUoD5rCEBqjZo5KXdjz0hjpUTHpXz5xRlxvlJYU/Q6Z mIDzeCTVhdRqAxUS0mJGSrTPhSb4/jy9LVJIfV9M= Received: from eusmges3new.samsung.com (unknown [203.254.199.245]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20190719150556eucas1p1e9ac7c8814f4e8b69d91e1cf0ce617d5~y109477zB3032530325eucas1p1y; Fri, 19 Jul 2019 15:05:56 +0000 (GMT) Received: from eucas1p1.samsung.com ( [182.198.249.206]) by eusmges3new.samsung.com (EUCPMTA) with SMTP id 49.73.04325.45CD13D5; Fri, 19 Jul 2019 16:05:56 +0100 (BST) Received: from eusmtrp2.samsung.com (unknown [182.198.249.139]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20190719150556eucas1p291b9e533a80d77e2f58452f0e1fe8b35~y109Ba8iK0285302853eucas1p2Q; Fri, 19 Jul 2019 15:05:56 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20190719150555eusmtrp2983997a2c991a32f3a605aec877cb344~y108zTXP53114831148eusmtrp2B; Fri, 19 Jul 2019 15:05:55 +0000 (GMT) X-AuditID: cbfec7f5-b75ff700000010e5-6a-5d31dc54f48e Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 70.07.04140.35CD13D5; Fri, 19 Jul 2019 16:05:55 +0100 (BST) Received: from AMDC3218.DIGITAL.local (unknown [106.120.51.18]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20190719150555eusmtip17fe0becde43c7ac63852dbdd51c5d713~y108EeL4R2871228712eusmtip16; Fri, 19 Jul 2019 15:05:54 +0000 (GMT) From: k.konieczny@partner.samsung.com To: k.konieczny@partner.samsung.com Cc: Marek Szyprowski , Bartlomiej Zolnierkiewicz , Chanwoo Choi , Krzysztof Kozlowski , Kukjin Kim , Kyungmin Park , Mark Rutland , MyungJoo Ham , Nishanth Menon , Rob Herring , Stephen Boyd , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v3 4/5] ARM: dts: exynos: add initial data for coupled regulators for Exynos5422/5800 Date: Fri, 19 Jul 2019 17:05:34 +0200 Message-Id: <20190719150535.15501-5-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190719150535.15501-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLKsWRmVeSWpSXmKPExsWy7djPc7ohdwxjDU7fVLXYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gtzjb9IbdYtPja6wWl3fNYbP43HuE0WLG+X1MFmuP3GW3 WHr9IpPF7cYVbBZvfpxlsmjde4Td4t+1jSwWmx8cY3MQ8lgzbw2jx6ZVnWwem5fUexx8t4fJ o2/LKkaP4ze2M3l83iQXwB7FZZOSmpNZllqkb5fAlXHivW/BCZuKOQvesDcw3tDrYuTkkBAw kfh19AprFyMXh5DACkaJswuPM0E4Xxgllj28zg7hfGaUeNd4DCjDAdYyryECpFtIYDmjxLSp CA337+9nAkmwCahKbJnxkh3EFhFQlph8bzozSBGzwE8WidO7mllBEsIC6RI/Wr+zgNgsQA0v Zk8Aa+AVcJFouvyIDeI+eYnOHbvBajgFXCW+HHwPVSMocXLmE7A4M1BN89bZYAskBD6yS3x6 2c0K0ewicbSvmQXCFpZ4dXwLO4QtI/F/53wmCLtc4unCPnaI5hZGiQftH6EarCUOH7/ICvIy s4CmxPpd+hBhR4m+H1+gIcEnceOtIMQNfBKTtoE8CRLmlehoE4Ko1pWY9/8M1DXSEl3/10HZ HhLrT/xgnsCoOAvJN7OQfDMLYe8CRuZVjOKppcW56anFxnmp5XrFibnFpXnpesn5uZsYgYnu 9L/jX3cw7vuTdIhRgINRiYf3wy3DWCHWxLLiytxDjBIczEoivLdf6scK8aYkVlalFuXHF5Xm pBYfYpTmYFES561meBAtJJCeWJKanZpakFoEk2Xi4JRqYMxWPtFQcn+bSpzlasWAhqU/m1WS 2RLT56nlPbR9N3+B8UuetQePCzxuNnXQt888Znf+y8Ofd6fZqfw8sPiLUnVW2EXr71c7Xq37 LzZJ2jxhS75WllOAsfKfoul7JdTnTXopOJmxK/Lay0IvW8Yox+tz11y/q+O05c6bgwvyXbof M2munVf1u1iJpTgj0VCLuag4EQB0yvpxcAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrNIsWRmVeSWpSXmKPExsVy+t/xu7rBdwxjDTqW6FlsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW5xtesNusenxNVaLy7vmsFl87j3CaDHj/D4mi7VH7rJb LL1+kcniduMKNos3P84yWbTuPcJu8e/aRhaLzQ+OsTkIeayZt4bRY9OqTjaPzUvqPQ6+28Pk 0bdlFaPH8RvbmTw+b5ILYI/SsynKLy1JVcjILy6xVYo2tDDSM7S00DMysdQzNDaPtTIyVdK3 s0lJzcksSy3St0vQyzjx3rfghE3FnAVv2BsYb+h1MXJwSAiYSMxriOhi5OQQEljKKLG1oxrE lhCQlmg8vZoJwhaW+HOti62LkQuo5hOjxKRtdxlBEmwCqhJbZrxkB7FFBJQlJt+bzgxSxCzQ ySqxZNJfsISwQKrEoQ9TwCaxADW8mD0BLM4r4CLRdPkRG8QGeYnOHbtZQGxOAVeJLwffs0Nc 5CKxY+U8Zoh6QYmTM5+A1TAD1Tdvnc08gVFgFpLULCSpBYxMqxhFUkuLc9Nzi430ihNzi0vz 0vWS83M3MQIjctuxn1t2MHa9Cz7EKMDBqMTD++GWYawQa2JZcWXuIUYJDmYlEd7bL/VjhXhT EiurUovy44tKc1KLDzGaAj0xkVlKNDkfmCzySuINTQ3NLSwNzY3Njc0slMR5OwQOxggJpCeW pGanphakFsH0MXFwSjUwur8yLDRu/5gxeefdv1etFk6VTH3peFeqae8JFo83D/m89oQbsa+T 9XqfeVE3Lizk7oyG2qwQ9e0W9/y62g/uNVFOul6/RW+niXThlBW5lwRcsh9vP/qPOynp5nHX r908HN+zf6fKCn5svFcSfldgBmfy3g9sd0rWH/30dNd579edPUo1B5fMV2Ipzkg01GIuKk4E AJrt68zeAgAA X-CMS-MailID: 20190719150556eucas1p291b9e533a80d77e2f58452f0e1fe8b35 X-Msg-Generator: CA X-RootMTR: 20190719150556eucas1p291b9e533a80d77e2f58452f0e1fe8b35 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190719150556eucas1p291b9e533a80d77e2f58452f0e1fe8b35 References: <20190719150535.15501-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Marek Szyprowski Declare Exynos5422/5800 voltage ranges for opp points for big cpu core and bus wcore and couple their voltage supllies as vdd_arm and vdd_int should be in 300mV range. Signed-off-by: Marek Szyprowski [k.konieczny: add missing patch description] Signed-off-by: Kamil Konieczny Reviewed-by: Chanwoo Choi --- arch/arm/boot/dts/exynos5420.dtsi | 34 +++++++++---------- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 4 +++ arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 +++ arch/arm/boot/dts/exynos5800.dtsi | 32 ++++++++--------- 4 files changed, 41 insertions(+), 33 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 5fb2326875dc..0cbf74750553 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -48,62 +48,62 @@ opp-shared; opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; clock-latency-ns = <140000>; }; opp-1700000000 { opp-hz = /bits/ 64 <1700000000>; - opp-microvolt = <1212500>; + opp-microvolt = <1212500 1212500 1500000>; clock-latency-ns = <140000>; }; opp-1600000000 { opp-hz = /bits/ 64 <1600000000>; - opp-microvolt = <1175000>; + opp-microvolt = <1175000 1175000 1500000>; clock-latency-ns = <140000>; }; opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <1137500>; + opp-microvolt = <1137500 1137500 1500000>; clock-latency-ns = <140000>; }; opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; - opp-microvolt = <1112500>; + opp-microvolt = <1112500 1112500 1500000>; clock-latency-ns = <140000>; }; opp-1300000000 { opp-hz = /bits/ 64 <1300000000>; - opp-microvolt = <1062500>; + opp-microvolt = <1062500 1062500 1500000>; clock-latency-ns = <140000>; }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1037500>; + opp-microvolt = <1037500 1037500 1500000>; clock-latency-ns = <140000>; }; opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; - opp-microvolt = <1012500>; + opp-microvolt = <1012500 1012500 1500000>; clock-latency-ns = <140000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = < 987500>; + opp-microvolt = < 987500 987500 1500000>; clock-latency-ns = <140000>; }; opp-900000000 { opp-hz = /bits/ 64 <900000000>; - opp-microvolt = < 962500>; + opp-microvolt = < 962500 962500 1500000>; clock-latency-ns = <140000>; }; opp-800000000 { opp-hz = /bits/ 64 <800000000>; - opp-microvolt = < 937500>; + opp-microvolt = < 937500 937500 1500000>; clock-latency-ns = <140000>; }; opp-700000000 { opp-hz = /bits/ 64 <700000000>; - opp-microvolt = < 912500>; + opp-microvolt = < 912500 912500 1500000>; clock-latency-ns = <140000>; }; }; @@ -1100,23 +1100,23 @@ opp00 { opp-hz = /bits/ 64 <84000000>; - opp-microvolt = <925000>; + opp-microvolt = <925000 925000 1400000>; }; opp01 { opp-hz = /bits/ 64 <111000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp02 { opp-hz = /bits/ 64 <222000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp03 { opp-hz = /bits/ 64 <333000000>; - opp-microvolt = <950000>; + opp-microvolt = <950000 950000 1400000>; }; opp04 { opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <987500>; + opp-microvolt = <987500 987500 1400000>; }; }; diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 25d95de15c9b..65d094256b54 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -428,6 +428,8 @@ regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; }; buck3_reg: BUCK3 { @@ -436,6 +438,8 @@ regulator-max-microvolt = <1400000>; regulator-always-on; regulator-boot-on; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; }; buck4_reg: BUCK4 { diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index e0f470fe54c8..5c1e965ed7e9 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -257,6 +257,8 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; regulator-state-mem { regulator-off-in-suspend; }; @@ -269,6 +271,8 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; regulator-state-mem { regulator-off-in-suspend; }; diff --git a/arch/arm/boot/dts/exynos5800.dtsi b/arch/arm/boot/dts/exynos5800.dtsi index 57d3b319fd65..2a74735d161c 100644 --- a/arch/arm/boot/dts/exynos5800.dtsi +++ b/arch/arm/boot/dts/exynos5800.dtsi @@ -22,61 +22,61 @@ &cluster_a15_opp_table { opp-1700000000 { - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; }; opp-1600000000 { - opp-microvolt = <1250000>; + opp-microvolt = <1250000 1250000 1500000>; }; opp-1500000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1400000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1300000000 { - opp-microvolt = <1100000>; + opp-microvolt = <1100000 1100000 1500000>; }; opp-1200000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-1100000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-1000000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-900000000 { - opp-microvolt = <1000000>; + opp-microvolt = <1000000 1000000 1500000>; }; opp-800000000 { - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; }; opp-700000000 { - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-500000000 { opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-400000000 { opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-300000000 { opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; opp-200000000 { opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <900000>; + opp-microvolt = <900000 900000 1500000>; clock-latency-ns = <140000>; }; };