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[91.184.170.165]) by smtp.gmail.com with ESMTPSA id j9sm4594268ejf.105.2020.11.13.13.27.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Nov 2020 13:27:16 -0800 (PST) From: =?utf-8?q?Martin_J=C3=BCcker?= To: linux-samsung-soc@vger.kernel.org Cc: kgene@kernel.org, krzk@kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Martin_J=C3=BCcker?= Subject: [PATCH v3 3/5] ARM: defconfig: add stmpe adc driver for p4note Date: Fri, 13 Nov 2020 22:25:24 +0100 Message-Id: <20201113212525.13455-4-martin.juecker@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201113212525.13455-1-martin.juecker@gmail.com> References: <20201113212525.13455-1-martin.juecker@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Enable the stmpe adc driver for the p4note device family. Signed-off-by: Martin Jücker --- arch/arm/configs/exynos_defconfig | 3 +++ arch/arm/configs/multi_v7_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index cf82c9d23a08..c8ae45e5ad72 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -175,6 +175,8 @@ CONFIG_MFD_MAX77693=y CONFIG_MFD_MAX8997=y CONFIG_MFD_MAX8998=y CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_STMPE=y +CONFIG_STMPE_I2C=y CONFIG_MFD_TPS65090=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y @@ -319,6 +321,7 @@ CONFIG_EXTCON_MAX77693=y CONFIG_EXTCON_MAX8997=y CONFIG_IIO=y CONFIG_EXYNOS_ADC=y +CONFIG_STMPE_ADC=y CONFIG_CM36651=y CONFIG_AK8975=y CONFIG_PWM=y diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index a611b0c1e540..0c71d82dc837 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -557,6 +557,7 @@ CONFIG_MFD_RK808=y CONFIG_MFD_RN5T618=y CONFIG_MFD_SEC_CORE=y CONFIG_MFD_STMPE=y +CONFIG_STMPE_I2C=y CONFIG_MFD_PALMAS=y CONFIG_MFD_TPS65090=y CONFIG_MFD_TPS65217=y @@ -1024,6 +1025,7 @@ CONFIG_AT91_SAMA5D2_ADC=m CONFIG_BERLIN2_ADC=m CONFIG_CPCAP_ADC=m CONFIG_EXYNOS_ADC=m +CONFIG_STMPE_ADC=m CONFIG_MESON_SARADC=m CONFIG_ROCKCHIP_SARADC=m CONFIG_STM32_ADC_CORE=m