From patchwork Wed Dec 1 19:04:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12650839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24A94C43217 for ; Wed, 1 Dec 2021 19:05:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352596AbhLATIX (ORCPT ); Wed, 1 Dec 2021 14:08:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352125AbhLATIV (ORCPT ); Wed, 1 Dec 2021 14:08:21 -0500 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55C86C06174A for ; Wed, 1 Dec 2021 11:05:00 -0800 (PST) Received: by mail-lf1-x130.google.com with SMTP id bi37so65441107lfb.5 for ; Wed, 01 Dec 2021 11:05:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AQDun0CJwvM7UQvnluW9dd4LbyUPdKYwbZE5uoVdvOU=; b=QOk2jhLZBSZEjsNg2ZX1HZj7ZbL+gPrU3uTZXF+74C1Ft+LZaIX1QFe6IJAx5gnOgA paxpTFYYkNdavEuXOkFJ0ZIdc5CoYLme8f6QRac/t2rnhsOatPMKm32BkvILVocK5Hk1 6RJRTCzL2qpF4gPlfwrZM3w2v1/o0iW0+WfDOF+aJ0zyj7ym8KGnFenEjcku1pTbKsXh qob0S81qBKydaiMxE9p3+SVbmd2nWI9vPBgmjIki+eDYUAYkYAG0btWmVeJ4LYINwHT/ 3dXghxZoWDQh0Jc8CF1pEvjL1g2fEiAApP2X1/6mJKD98YguTIr+EaI+6aexxCj/G0ap tZcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AQDun0CJwvM7UQvnluW9dd4LbyUPdKYwbZE5uoVdvOU=; b=FUVehHWg7ok3BL6+iZHnA+d8ctqfAcB/XjD9SppkaW+XuNbeX2QsomO/SrKYuHNBUR +RjhLYRoCWBiFG4qnNLgd14u4d9dbm76gENVQw8gkLpvlaczTCREVfNvKEpZuoL4Xyeu 3dNG6FauU6ruS+y5PbdiNY0Lx/NRt66f0SQDLQOeyXRYfanCv4ckEYZmjo9CyYf943Db WZWqPR+WQ1T5nK6xhc9nxpGo944iVI9Fpif9GFRoscx9JLWfUTHoPEcVsWwXKdrTo6NT pCUN0fsgwCPaHkd4KpsURuN5Ir34wC2wWo4uCJeSBzSEYMMgTN98aLF0/JYo11V+bHk4 ddSQ== X-Gm-Message-State: AOAM533xzvlYzQZEu1QqvtFIs1213eCXzKf52iwY8AHczFwRbtREQowZ 1PnpSuGi9fodr71KyByQGLq/Kg== X-Google-Smtp-Source: ABdhPJyinqe77utFYvpWzDgZHKPTgwSqv6ZB2SE7iZkufbtEZi8kvrFdCnQkRYOITN+HkdDtvYDHMA== X-Received: by 2002:a05:6512:36c9:: with SMTP id e9mr7617984lfs.87.1638385498478; Wed, 01 Dec 2021 11:04:58 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id m9sm72412ljg.80.2021.12.01.11.04.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 11:04:58 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH 1/6] dt-bindings: i2c: exynos5: Convert to dtschema Date: Wed, 1 Dec 2021 21:04:50 +0200 Message-Id: <20211201190455.31646-2-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211201190455.31646-1-semen.protsenko@linaro.org> References: <20211201190455.31646-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Convert Samsung Exynos High Speed I2C bindings doc to DT schema format. Changes during bindings conversion: 1. Added missing required clock properties (driver fails when it's unable to get the clock) 2. Removed properties and descriptions that can be found in schemas/i2c/i2c-controller.yaml [1] 3. Fixed the example so it can be validated by dtschema [1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/i2c/i2c-exynos5.txt | 53 ------------ .../devicetree/bindings/i2c/i2c-exynos5.yaml | 80 +++++++++++++++++++ 2 files changed, 80 insertions(+), 53 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt deleted file mode 100644 index 2dbc0b62daa6..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt +++ /dev/null @@ -1,53 +0,0 @@ -* Samsung's High Speed I2C controller - -The Samsung's High Speed I2C controller is used to interface with I2C devices -at various speeds ranging from 100khz to 3.4Mhz. - -Required properties: - - compatible: value should be. - -> "samsung,exynos5-hsi2c", (DEPRECATED) - for i2c compatible with HSI2C available - on Exynos5250 and Exynos5420 SoCs. - -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available - on Exynos5250 and Exynos5420 SoCs. - -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available - on Exynos5260 SoCs. - -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available - on Exynos7 SoCs. - - - reg: physical base address of the controller and length of memory mapped - region. - - interrupts: interrupt number to the cpu. - - #address-cells: always 1 (for i2c addresses) - - #size-cells: always 0 - - - Pinctrl: - - pinctrl-0: Pin control group to be used for this controller. - - pinctrl-names: Should contain only one value - "default". - -Optional properties: - - clock-frequency: Desired operating frequency in Hz of the bus. - -> If not specified, the bus operates in fast-speed mode at - at 100khz. - -> If specified, the bus operates in high-speed mode only if the - clock-frequency is >= 1Mhz. - -Example: - -hsi2c@12ca0000 { - compatible = "samsung,exynos5250-hsi2c"; - reg = <0x12ca0000 0x100>; - interrupts = <56>; - clock-frequency = <100000>; - - pinctrl-0 = <&i2c4_bus>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <0>; - - s2mps11_pmic@66 { - compatible = "samsung,s2mps11-pmic"; - reg = <0x66>; - }; -}; diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml new file mode 100644 index 000000000000..53df1571eff1 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung's High Speed I2C controller + +maintainers: + - Krzysztof Kozlowski + +description: | + The Samsung's High Speed I2C controller is used to interface with I2C devices + at various speeds ranging from 100kHz to 3.4MHz. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + oneOf: + - enum: + - "samsung,exynos5250-hsi2c" # Exynos5250 and Exynos5420 + - "samsung,exynos5260-hsi2c" # Exynos5260 + - "samsung,exynos7-hsi2c" # Exynos7 + - const: "samsung,exynos5-hsi2c" # Exynos5250 and Exynos5420 + deprecated: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-frequency: + default: 100000 + description: + Desired operating frequency in Hz of the bus. + + If not specified, the bus operates in fast-speed mode at 100kHz. + + If specified, the bus operates in high-speed mode only if the + clock-frequency is >= 1MHz. + + clocks: + maxItems: 1 + description: I2C operating clock + + clock-names: + const: hsi2c + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + hsi2c_8: i2c@12e00000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12e00000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + clocks = <&clock CLK_USI4>; + clock-names = "hsi2c"; + + pmic@66 { + /* compatible = "samsung,s2mps11-pmic"; */ + reg = <0x66>; + }; + };