From patchwork Fri Dec 17 01:46:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 12683419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7446DC43219 for ; Fri, 17 Dec 2021 01:46:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231955AbhLQBqd (ORCPT ); Thu, 16 Dec 2021 20:46:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232012AbhLQBq1 (ORCPT ); Thu, 16 Dec 2021 20:46:27 -0500 Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54E5AC06173E for ; Thu, 16 Dec 2021 17:46:27 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id u22so927187lju.7 for ; Thu, 16 Dec 2021 17:46:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cund4wtK0i/KU/4eGL9XmJq/PTN5G6Wbgv5EFzO134g=; b=PBX9OyB8JvxfOTKKtWaO60zjJaGDDJwqKW2iURSwYcbbtppREFCS41QeswkG3Oj40m fEYtcu6wl108VnnsTliwatK0OKs8m89qTkynIzf66cE3eAQl3VyU1m02SyqH0mnPyzru kkZLvngqDoCnZ0sBaPyUdJSoVIuD/e2dHiPmlU+HRurtpVcpk2EQ8P+AA/lk5/6OItw+ Cm3G8S166w62O7jPEaz14CokNZymQW256XXCaDNiu5P6T1Hiv1cosO34U/YwcfMTXn2Q V3LGzSZWTLvQ9//MvFWvjHMGAk4sR10uPZqVBoAzzmOyCzeESN4ubH2NNWbhQ40jfAT/ EJgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cund4wtK0i/KU/4eGL9XmJq/PTN5G6Wbgv5EFzO134g=; b=Zf7bLREs6XTg8vUnN6R33rczGYra79UvnJrmGxVFUhw2y9Kze+lEX6eI8W8rIoepco PDKKhg+NZtzIXhO9Jap8lZTnIBAjXxXVevSO+op+QnMuSpB7ulD6L5jHb330QVkNyfLx DBw5P+VQ1iHujKedPRKG+bWApOJ5rMtYwFP6+eBMAXQvtYRbHVP2ZDsG2QlswJLmSv1T jOeQxESP5Gts1WgeCA5dJ+ENAlvmFmOVT01WdDXbTw1Pfe4zITyIdnCzqzuj7ncqI6lb DfsWdnVF84lusBlHlU4igEwSySZEC+O/hxbpkc8WPxcEgMVAO8kd2OE22OY3yCa7h5pz Z6NQ== X-Gm-Message-State: AOAM532ccBAzKYMvakin/bIXe1obMqMPdVgDOkdbW80/oMrzFkVCJCUP rM5xubEjVfYiHFNdIRGb1hSuVQ== X-Google-Smtp-Source: ABdhPJzqEMHvLjGL0W+4BI5wvo8YWLeD5939oEb2DVY0gm55Paha+IF7sPH1T2Pld2KLwwZta6aFvQ== X-Received: by 2002:a2e:8515:: with SMTP id j21mr672769lji.531.1639705585628; Thu, 16 Dec 2021 17:46:25 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id c2sm1137617lfb.270.2021.12.16.17.46.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 17:46:25 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring , Sylwester Nawrocki Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Tomasz Figa , Chanwoo Choi , Michael Turquette , Stephen Boyd , Linus Walleij , Daniel Palmer , Hao Fang , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH v3 7/7] arm64: dts: exynos: Add initial E850-96 board support Date: Fri, 17 Dec 2021 03:46:13 +0200 Message-Id: <20211217014613.15203-8-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211217014613.15203-1-semen.protsenko@linaro.org> References: <20211217014613.15203-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org E850-96 is a 96boards development board manufactured by WinLink. It incorporates Samsung Exynos850 SoC, and is compatible with 96boards mezzanine boards [1], as it follows 96boards standards. This patch adds minimal support for E850-96 board. Next features are enabled in board dts file and verified with minimal BusyBox rootfs: * User buttons * LEDs * Serial console * Watchdog timers * RTC * eMMC [1] https://www.96boards.org/products/mezzanine/ Signed-off-by: Sam Protsenko --- Changes in v3: - Ordered the pinctrl_alive phandle alphabetically (forgot to do so in v2) Changes in v2: - Removed board_id and board_rev properties - Removed BOARD_ID and BOARD_REV constants - Put dtb in alphabetical order in Makefile - Added "color" and "function" properties to LED nodes - Sorted all phandle overrides by phandle name - Removed 'broken-cd' property in eMMC node - Added memory node arch/arm64/boot/dts/exynos/Makefile | 1 + .../boot/dts/exynos/exynos850-e850-96.dts | 175 ++++++++++++++++++ 2 files changed, 176 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos850-e850-96.dts diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index b41e86df0a84..be9df8e85c59 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -3,4 +3,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos5433-tm2.dtb \ exynos5433-tm2e.dtb \ exynos7-espresso.dtb \ + exynos850-e850-96.dtb \ exynosautov9-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts b/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts new file mode 100644 index 000000000000..0cdff97bb1a1 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * WinLink E850-96 board device tree source + * + * Copyright (C) 2018 Samsung Electronics Co., Ltd. + * Copyright (C) 2021 Linaro Ltd. + * + * Device tree source file for WinLink's E850-96 board which is based on + * Samsung Exynos850 SoC. + */ + +/dts-v1/; + +#include "exynos850.dtsi" +#include +#include +#include + +/ { + model = "WinLink E850-96 board"; + compatible = "winlink,e850-96", "samsung,exynos850"; + + chosen { + stdout-path = &serial_0; + }; + + /* + * 4 GiB eMCP: + * - 2 GiB at 0x80000000 + * - 2 GiB at 0x880000000 + * + * 0xbab00000..0xbfffffff: secure memory (85 MiB). + */ + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x3ab00000>, + <0x0 0xc0000000 0x40000000>, + <0x8 0x80000000 0x80000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key_voldown_pins &key_volup_pins>; + + volume-down-key { + label = "Volume Down"; + linux,code = ; + gpios = <&gpa1 0 GPIO_ACTIVE_LOW>; + }; + + volume-up-key { + label = "Volume Up"; + linux,code = ; + gpios = <&gpa0 7 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + /* HEART_BEAT_LED */ + user_led1: led-1 { + label = "yellow:user1"; + gpios = <&gpg2 2 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_HEARTBEAT; + linux,default-trigger = "heartbeat"; + }; + + /* eMMC_LED */ + user_led2: led-2 { + label = "yellow:user2"; + gpios = <&gpg2 3 GPIO_ACTIVE_HIGH>; + color = ; + linux,default-trigger = "mmc0"; + }; + + /* SD_LED */ + user_led3: led-3 { + label = "white:user3"; + gpios = <&gpg2 4 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_SD; + linux,default-trigger = "mmc2"; + }; + + /* WIFI_LED */ + wlan_active_led: led-4 { + label = "yellow:wlan"; + gpios = <&gpg2 6 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + /* BLUETOOTH_LED */ + bt_active_led: led-5 { + label = "blue:bt"; + gpios = <&gpg2 7 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_BLUETOOTH; + linux,default-trigger = "hci0rx"; + default-state = "off"; + }; + }; +}; + +&mmc_0 { + status = "okay"; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + cap-mmc-highspeed; + non-removable; + mmc-hs400-enhanced-strobe; + card-detect-delay = <200>; + clock-frequency = <800000000>; + bus-width = <8>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <2 4>; + samsung,dw-mshc-hs400-timing = <0 2>; + + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk_pins &sd0_cmd_pins &sd0_rdqs_pins &sd0_nreset_pins + &sd0_bus1_pins &sd0_bus4_pins &sd0_bus8_pins>; +}; + +&oscclk { + clock-frequency = <26000000>; +}; + +&pinctrl_alive { + key_voldown_pins: key-voldown-pins { + samsung,pins = "gpa1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + key_volup_pins: key-volup-pins { + samsung,pins = "gpa0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; + +&rtc { + status = "okay"; +}; + +&rtcclk { + clock-frequency = <32768>; +}; + +&serial_0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&usi_uart { + samsung,clkreq-on; /* needed for UART mode */ + status = "okay"; +}; + +&watchdog_cl0 { + status = "okay"; +}; + +&watchdog_cl1 { + status = "okay"; +};