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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id v9sm2454505lja.109.2021.12.30.11.53.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 11:53:36 -0800 (PST) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Marek Szyprowski , Jaehoon Chung , Chanho Park , Sam Protsenko , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sylwester Nawrocki , stable@vger.kernel.org Subject: [RFT][PATCH 2/3] arm64: dts: exynos: fix WLAN pin configuration in TM2 Date: Thu, 30 Dec 2021 20:53:24 +0100 Message-Id: <20211230195325.328220-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211230195325.328220-1-krzysztof.kozlowski@canonical.com> References: <20211230195325.328220-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Each pin configuration in pin controller should be a node with "samsung,pins" and other similar properties. However the macro PIN() (used for initial/sleep states) defines entire node, so PCIe WLAN pin configuration node was ignored. Fixes: 98c03b6eef3f ("arm64: dts: exynos: add the WiFi/PCIe support to TM2(e) boards") Cc: Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index cbcc01a66aab..c5054c7a9c03 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -1104,8 +1104,11 @@ &pinctrl_ese { pinctrl-names = "default"; pinctrl-0 = <&initial_ese>; - pcie_wlanen: pcie-wlanen { - PIN(INPUT, gpj2-0, UP, FAST_SR4); + pcie_wlanen: pcie-wlanen-pins { + samsung,pins = "gpj2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; }; initial_ese: initial-state {