| Message ID | 20220113121143.22280-16-alim.akhtar@samsung.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [01/23] dt-bindings: clock: Document FSD CMU bindings | expand |
On 13/01/2022 13:11, Alim Akhtar wrote: > Add initial pin configuration nodes for FSD SoC. > > Cc: linux-fsd@tesla.com > Signed-off-by: Shashank Prashar <s.prashar@samsung.com> > Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> > Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> > --- > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 338 +++++++++++++++++++++ > arch/arm64/boot/dts/tesla/fsd.dtsi | 22 ++ > 2 files changed, 360 insertions(+) > create mode 100644 arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > new file mode 100644 > index 000000000000..ec8d944af636 > --- /dev/null > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > @@ -0,0 +1,338 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Tesla Full Self-Driving SoC device tree source > + * > + * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd. > + * https://www.samsung.com > + * Copyright (c) 2017-2021 Tesla, Inc. > + * https://www.tesla.com > + */ > + > +#include <dt-bindings/pinctrl/samsung.h> > + > +&pinctrl_fsys0 { > + No need for empty line. > + gpf0: gpf0 { FYI: It's ok now, but the nodes will have to be renamed to "xxx-gpio-bank" later. > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf1: gpf1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf6: gpf6 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf4: gpf4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf5: gpf5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > +}; > + > +&pinctrl_peric { > + No need for empty line. > + gpc8: gpc8 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf2: gpf2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpf3: gpf3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd0: gpd0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb0: gpb0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb1: gpb1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb4: gpb4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb5: gpb5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb6: gpb6 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpb7: gpb7 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd1: gpd1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd2: gpd2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpd3: gpd3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg0: gpg0 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg1: gpg1 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg2: gpg2 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg3: gpg3 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg4: gpg4 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg5: gpg5 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg6: gpg6 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + gpg7: gpg7 { > + gpio-controller; > + #gpio-cells = <2>; > + > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + > + pwm0_out: pwm0-out { All pin configuretion node names with "-pins" suffix. Upcoming dtschema will require this. > + samsung,pins = "gpb6-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; > + }; > + > + pwm1_out: pwm1-out { > + samsung,pins = "gpb6-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; > + }; > + > + hs_i2c0_bus: hs-i2c0-bus { > + samsung,pins = "gpb0-0", "gpb0-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + hs_i2c1_bus: hs-i2c1-bus { > + samsung,pins = "gpb0-2", "gpb0-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + hs_i2c2_bus: hs-i2c2-bus { > + samsung,pins = "gpb0-4", "gpb0-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + hs_i2c3_bus: hs-i2c3-bus { > + samsung,pins = "gpb0-6", "gpb0-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + hs_i2c4_bus: hs-i2c4-bus { > + samsung,pins = "gpb1-0", "gpb1-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + hs_i2c5_bus: hs-i2c5-bus { > + samsung,pins = "gpb1-2", "gpb1-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + hs_i2c6_bus: hs-i2c6-bus { > + samsung,pins = "gpb1-4", "gpb1-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + hs_i2c7_bus: hs-i2c7-bus { > + samsung,pins = "gpb1-6", "gpb1-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + uart0_data: uart0-data { > + samsung,pins = "gpb7-0", "gpb7-1"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + uart1_data: uart1-data { > + samsung,pins = "gpb7-4", "gpb7-5"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + spi0_bus: spi0-bus { > + samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + spi1_bus: spi1-bus { > + samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > + > + spi2_bus: spi2-bus { > + samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; > + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; > + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; > + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; > + }; > +}; > + > +&pinctrl_pmu { > + No need for empty line. > + gpq0: gpq0 { > + gpio-controller; > + #gpio-cells = <2>; > + }; Best regards, Krzysztof
Hi Krzysztof >-----Original Message----- >From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com] >Sent: Thursday, January 13, 2022 6:50 PM >To: Alim Akhtar <alim.akhtar@samsung.com>; linux-arm- >kernel@lists.infradead.org; linux-kernel@vger.kernel.org >Cc: soc@kernel.org; linux-clk@vger.kernel.org; devicetree@vger.kernel.org; >olof@lixom.net; linus.walleij@linaro.org; catalin.marinas@arm.com; >robh+dt@kernel.org; s.nawrocki@samsung.com; linux-samsung- >soc@vger.kernel.org; pankaj.dubey@samsung.com; linux-fsd@tesla.com; >Shashank Prashar <s.prashar@samsung.com>; Aswani Reddy ><aswani.reddy@samsung.com> >Subject: Re: [PATCH 15/23] arm64: dts: fsd: Add initial pinctrl support > >On 13/01/2022 13:11, Alim Akhtar wrote: >> Add initial pin configuration nodes for FSD SoC. >> >> Cc: linux-fsd@tesla.com >> Signed-off-by: Shashank Prashar <s.prashar@samsung.com> >> Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> >> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> >> --- >> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 338 >+++++++++++++++++++++ >> arch/arm64/boot/dts/tesla/fsd.dtsi | 22 ++ >> 2 files changed, 360 insertions(+) >> create mode 100644 arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >> >> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >> b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >> new file mode 100644 >> index 000000000000..ec8d944af636 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >> @@ -0,0 +1,338 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Tesla Full Self-Driving SoC device tree source >> + * >> + * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd. >> + * https://www.samsung.com >> + * Copyright (c) 2017-2021 Tesla, Inc. >> + * https://www.tesla.com >> + */ >> + >> +#include <dt-bindings/pinctrl/samsung.h> >> + >> +&pinctrl_fsys0 { >> + > >No need for empty line. > Noted >> + gpf0: gpf0 { > >FYI: >It's ok now, but the nodes will have to be renamed to "xxx-gpio-bank" later. > Have rebased my v2 on your pinmux schema update, so these and below comments are addressed. Thanks >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf1: gpf1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf6: gpf6 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf4: gpf4 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf5: gpf5 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> +}; >> + >> +&pinctrl_peric { >> + > >No need for empty line. > >> + gpc8: gpc8 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf2: gpf2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpf3: gpf3 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpd0: gpd0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb0: gpb0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb1: gpb1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb4: gpb4 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb5: gpb5 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb6: gpb6 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpb7: gpb7 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpd1: gpd1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpd2: gpd2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpd3: gpd3 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg0: gpg0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg1: gpg1 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg2: gpg2 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg3: gpg3 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg4: gpg4 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg5: gpg5 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg6: gpg6 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + gpg7: gpg7 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + pwm0_out: pwm0-out { > >All pin configuretion node names with "-pins" suffix. Upcoming dtschema will >require this. > >> + samsung,pins = "gpb6-1"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; >> + }; >> + >> + pwm1_out: pwm1-out { >> + samsung,pins = "gpb6-5"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; >> + }; >> + >> + hs_i2c0_bus: hs-i2c0-bus { >> + samsung,pins = "gpb0-0", "gpb0-1"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + hs_i2c1_bus: hs-i2c1-bus { >> + samsung,pins = "gpb0-2", "gpb0-3"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + hs_i2c2_bus: hs-i2c2-bus { >> + samsung,pins = "gpb0-4", "gpb0-5"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + hs_i2c3_bus: hs-i2c3-bus { >> + samsung,pins = "gpb0-6", "gpb0-7"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + hs_i2c4_bus: hs-i2c4-bus { >> + samsung,pins = "gpb1-0", "gpb1-1"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + hs_i2c5_bus: hs-i2c5-bus { >> + samsung,pins = "gpb1-2", "gpb1-3"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + hs_i2c6_bus: hs-i2c6-bus { >> + samsung,pins = "gpb1-4", "gpb1-5"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + hs_i2c7_bus: hs-i2c7-bus { >> + samsung,pins = "gpb1-6", "gpb1-7"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + uart0_data: uart0-data { >> + samsung,pins = "gpb7-0", "gpb7-1"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + uart1_data: uart1-data { >> + samsung,pins = "gpb7-4", "gpb7-5"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + spi0_bus: spi0-bus { >> + samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + spi1_bus: spi1-bus { >> + samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> + >> + spi2_bus: spi2-bus { >> + samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; >> + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; >> + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; >> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; >> + }; >> +}; >> + >> +&pinctrl_pmu { >> + > >No need for empty line. > >> + gpq0: gpq0 { >> + gpio-controller; >> + #gpio-cells = <2>; >> + }; > > > > >Best regards, >Krzysztof
On 17/01/2022 14:44, Alim Akhtar wrote: > Hi Krzysztof > >> -----Original Message----- >> From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com] >> Sent: Thursday, January 13, 2022 6:50 PM >> To: Alim Akhtar <alim.akhtar@samsung.com>; linux-arm- >> kernel@lists.infradead.org; linux-kernel@vger.kernel.org >> Cc: soc@kernel.org; linux-clk@vger.kernel.org; devicetree@vger.kernel.org; >> olof@lixom.net; linus.walleij@linaro.org; catalin.marinas@arm.com; >> robh+dt@kernel.org; s.nawrocki@samsung.com; linux-samsung- >> soc@vger.kernel.org; pankaj.dubey@samsung.com; linux-fsd@tesla.com; >> Shashank Prashar <s.prashar@samsung.com>; Aswani Reddy >> <aswani.reddy@samsung.com> >> Subject: Re: [PATCH 15/23] arm64: dts: fsd: Add initial pinctrl support >> >> On 13/01/2022 13:11, Alim Akhtar wrote: >>> Add initial pin configuration nodes for FSD SoC. >>> >>> Cc: linux-fsd@tesla.com >>> Signed-off-by: Shashank Prashar <s.prashar@samsung.com> >>> Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> >>> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> >>> --- >>> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 338 >> +++++++++++++++++++++ >>> arch/arm64/boot/dts/tesla/fsd.dtsi | 22 ++ >>> 2 files changed, 360 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>> >>> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>> b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>> new file mode 100644 >>> index 000000000000..ec8d944af636 >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>> @@ -0,0 +1,338 @@ >>> +// SPDX-License-Identifier: GPL-2.0 >>> +/* >>> + * Tesla Full Self-Driving SoC device tree source >>> + * >>> + * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd. >>> + * https://www.samsung.com >>> + * Copyright (c) 2017-2021 Tesla, Inc. >>> + * https://www.tesla.com >>> + */ >>> + >>> +#include <dt-bindings/pinctrl/samsung.h> >>> + >>> +&pinctrl_fsys0 { >>> + >> >> No need for empty line. >> > Noted > >>> + gpf0: gpf0 { >> >> FYI: >> It's ok now, but the nodes will have to be renamed to "xxx-gpio-bank" later. >> > Have rebased my v2 on your pinmux schema update, so these and below comments are addressed. > Thanks > OK, but have in mind that -gpio-bank suffix is not needed now. This depends on support in the pinctrl driver, which will be applied after the merge window to different tree or branches than DTS is going to. Therefore if I apply your DTS with "-gpio-bank" to my next/dt64, the kernel won't find GPIo banks and won't properly boot. The linux-next will be fine, just my next/dt64 won't be. If you're fine with it - use "-gpio-bank" suffix. If you prefer my next/dt64 to have a fully working Tesla SoC DTS, then stick to old node naming and let's replace it later. Best regards, Krzysztof
>-----Original Message----- >From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com] >Sent: Monday, January 17, 2022 7:20 PM >To: Alim Akhtar <alim.akhtar@samsung.com>; linux-arm- >kernel@lists.infradead.org; linux-kernel@vger.kernel.org >Cc: soc@kernel.org; linux-clk@vger.kernel.org; devicetree@vger.kernel.org; >olof@lixom.net; linus.walleij@linaro.org; catalin.marinas@arm.com; >robh+dt@kernel.org; s.nawrocki@samsung.com; linux-samsung- >soc@vger.kernel.org; pankaj.dubey@samsung.com; linux-fsd@tesla.com; >'Shashank Prashar' <s.prashar@samsung.com>; 'Aswani Reddy' ><aswani.reddy@samsung.com> >Subject: Re: [PATCH 15/23] arm64: dts: fsd: Add initial pinctrl support > >On 17/01/2022 14:44, Alim Akhtar wrote: >> Hi Krzysztof >> >>> -----Original Message----- >>> From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com] >>> Sent: Thursday, January 13, 2022 6:50 PM >>> To: Alim Akhtar <alim.akhtar@samsung.com>; linux-arm- >>> kernel@lists.infradead.org; linux-kernel@vger.kernel.org >>> Cc: soc@kernel.org; linux-clk@vger.kernel.org; >>> devicetree@vger.kernel.org; olof@lixom.net; linus.walleij@linaro.org; >>> catalin.marinas@arm.com; >>> robh+dt@kernel.org; s.nawrocki@samsung.com; linux-samsung- >>> soc@vger.kernel.org; pankaj.dubey@samsung.com; linux-fsd@tesla.com; >>> Shashank Prashar <s.prashar@samsung.com>; Aswani Reddy >>> <aswani.reddy@samsung.com> >>> Subject: Re: [PATCH 15/23] arm64: dts: fsd: Add initial pinctrl >>> support >>> >>> On 13/01/2022 13:11, Alim Akhtar wrote: >>>> Add initial pin configuration nodes for FSD SoC. >>>> >>>> Cc: linux-fsd@tesla.com >>>> Signed-off-by: Shashank Prashar <s.prashar@samsung.com> >>>> Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> >>>> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> >>>> --- >>>> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 338 >>> +++++++++++++++++++++ >>>> arch/arm64/boot/dts/tesla/fsd.dtsi | 22 ++ >>>> 2 files changed, 360 insertions(+) >>>> create mode 100644 arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>>> >>>> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>>> b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>>> new file mode 100644 >>>> index 000000000000..ec8d944af636 >>>> --- /dev/null >>>> +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi >>>> @@ -0,0 +1,338 @@ >>>> +// SPDX-License-Identifier: GPL-2.0 >>>> +/* >>>> + * Tesla Full Self-Driving SoC device tree source >>>> + * >>>> + * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd. >>>> + * https://www.samsung.com >>>> + * Copyright (c) 2017-2021 Tesla, Inc. >>>> + * https://www.tesla.com >>>> + */ >>>> + >>>> +#include <dt-bindings/pinctrl/samsung.h> >>>> + >>>> +&pinctrl_fsys0 { >>>> + >>> >>> No need for empty line. >>> >> Noted >> >>>> + gpf0: gpf0 { >>> >>> FYI: >>> It's ok now, but the nodes will have to be renamed to "xxx-gpio-bank" >later. >>> >> Have rebased my v2 on your pinmux schema update, so these and below >comments are addressed. >> Thanks >> > >OK, but have in mind that -gpio-bank suffix is not needed now. This depends >on support in the pinctrl driver, which will be applied after the merge window >to different tree or branches than DTS is going to. >Therefore if I apply your DTS with "-gpio-bank" to my next/dt64, the kernel >won't find GPIo banks and won't properly boot. The linux-next will be fine, >just my next/dt64 won't be. > Thanks, got it, for now let me send v2 on linux-next (as of today). As required I will rebase to your next/dt64 and send again. Which also means that my v2 will not be based on your new pinmux schema. Probably we will move to that after the merge window. >If you're fine with it - use "-gpio-bank" suffix. If you prefer my >next/dt64 to have a fully working Tesla SoC DTS, then stick to old node naming >and let's replace it later. > >Best regards, >Krzysztof
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi new file mode 100644 index 000000000000..ec8d944af636 --- /dev/null +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -0,0 +1,338 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Tesla Full Self-Driving SoC device tree source + * + * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd. + * https://www.samsung.com + * Copyright (c) 2017-2021 Tesla, Inc. + * https://www.tesla.com + */ + +#include <dt-bindings/pinctrl/samsung.h> + +&pinctrl_fsys0 { + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf6: gpf6 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf4: gpf4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf5: gpf5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_peric { + + gpc8: gpc8 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd0: gpd0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb4: gpb4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb5: gpb5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb6: gpb6 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb7: gpb7 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd2: gpd2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd3: gpd3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg4: gpg4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg5: gpg5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg6: gpg6 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg7: gpg7 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pwm0_out: pwm0-out { + samsung,pins = "gpb6-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpb6-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + }; + + hs_i2c0_bus: hs-i2c0-bus { + samsung,pins = "gpb0-0", "gpb0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hs_i2c1_bus: hs-i2c1-bus { + samsung,pins = "gpb0-2", "gpb0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hs_i2c2_bus: hs-i2c2-bus { + samsung,pins = "gpb0-4", "gpb0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hs_i2c3_bus: hs-i2c3-bus { + samsung,pins = "gpb0-6", "gpb0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hs_i2c4_bus: hs-i2c4-bus { + samsung,pins = "gpb1-0", "gpb1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hs_i2c5_bus: hs-i2c5-bus { + samsung,pins = "gpb1-2", "gpb1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hs_i2c6_bus: hs-i2c6-bus { + samsung,pins = "gpb1-4", "gpb1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hs_i2c7_bus: hs-i2c7-bus { + samsung,pins = "gpb1-6", "gpb1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + uart0_data: uart0-data { + samsung,pins = "gpb7-0", "gpb7-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + uart1_data: uart1-data { + samsung,pins = "gpb7-4", "gpb7-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + spi1_bus: spi1-bus { + samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + spi2_bus: spi2-bus { + samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; + +&pinctrl_pmu { + + gpq0: gpq0 { + gpio-controller; + #gpio-cells = <2>; + }; +}; diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index 47cd9f20566e..811186e5ba4d 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -29,6 +29,9 @@ hsi2c5 = &hsi2c_5; hsi2c6 = &hsi2c_6; hsi2c7 = &hsi2c_7; + pinctrl0 = &pinctrl_fsys0; + pinctrl1 = &pinctrl_peric; + pinctrl2 = &pinctrl_pmu; }; cpus { @@ -711,5 +714,24 @@ clock-names = "hsi2c"; status = "disabled"; }; + + pinctrl_fsys0: pinctrl@15020000 { + compatible = "tesla,fsd-pinctrl"; + reg = <0x0 0x15020000 0x0 0x1000>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_peric: pinctrl@141F0000 { + compatible = "tesla,fsd-pinctrl"; + reg = <0x0 0x141F0000 0x0 0x1000>; + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_pmu: pinctrl@114F0000 { + compatible = "tesla,fsd-pinctrl"; + reg = <0x0 0x114F0000 0x0 0x1000>; + }; }; }; + +#include "fsd-pinctrl.dtsi"