| Message ID | 20220627005210.6473-2-chanho61.park@samsung.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | b6740089b740b842d5e6ff55b4b2c3bf5961c69a |
| Headers | show |
| Series | [1/3] dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1 | expand |
On 27/06/2022 02:52, Chanho Park wrote: > There are duplicated definitions of peric0 and peric1 cmu blocks. Thus, > they should be defined correctly as numerical order. > > Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9") > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > .../dt-bindings/clock/samsung,exynosautov9.h | 56 +++++++++---------- > 1 file changed, 28 insertions(+), 28 deletions(-) > > diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h b/include/dt-bindings/clock/samsung,exynosautov9.h > index ea9f91b4eb1a..a7db6516593f 100644 > --- a/include/dt-bindings/clock/samsung,exynosautov9.h > +++ b/include/dt-bindings/clock/samsung,exynosautov9.h > @@ -226,21 +226,21 @@ > #define CLK_GOUT_PERIC0_IPCLK_8 28 > #define CLK_GOUT_PERIC0_IPCLK_9 29 > #define CLK_GOUT_PERIC0_IPCLK_10 30 > -#define CLK_GOUT_PERIC0_IPCLK_11 30 > -#define CLK_GOUT_PERIC0_PCLK_0 31 > -#define CLK_GOUT_PERIC0_PCLK_1 32 > -#define CLK_GOUT_PERIC0_PCLK_2 33 > -#define CLK_GOUT_PERIC0_PCLK_3 34 > -#define CLK_GOUT_PERIC0_PCLK_4 35 > -#define CLK_GOUT_PERIC0_PCLK_5 36 > -#define CLK_GOUT_PERIC0_PCLK_6 37 > -#define CLK_GOUT_PERIC0_PCLK_7 38 > -#define CLK_GOUT_PERIC0_PCLK_8 39 > -#define CLK_GOUT_PERIC0_PCLK_9 40 > -#define CLK_GOUT_PERIC0_PCLK_10 41 > -#define CLK_GOUT_PERIC0_PCLK_11 42 > +#define CLK_GOUT_PERIC0_IPCLK_11 31 > +#define CLK_GOUT_PERIC0_PCLK_0 32 > +#define CLK_GOUT_PERIC0_PCLK_1 33 Is this a fix for current cycle? If yes, it's ok, otherwise all other IDs should not be changed, because it's part of ABI. Best regards, Krzysztof
> Subject: Re: [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock > numbering of peric0/c1 > > On 27/06/2022 02:52, Chanho Park wrote: > > There are duplicated definitions of peric0 and peric1 cmu blocks. > > Thus, they should be defined correctly as numerical order. > > > > Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding > > definitions for Exynos Auto v9") > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > > --- > > .../dt-bindings/clock/samsung,exynosautov9.h | 56 > > +++++++++---------- > > 1 file changed, 28 insertions(+), 28 deletions(-) > > > > diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h > > b/include/dt-bindings/clock/samsung,exynosautov9.h > > index ea9f91b4eb1a..a7db6516593f 100644 > > --- a/include/dt-bindings/clock/samsung,exynosautov9.h > > +++ b/include/dt-bindings/clock/samsung,exynosautov9.h > > @@ -226,21 +226,21 @@ > > #define CLK_GOUT_PERIC0_IPCLK_8 28 > > #define CLK_GOUT_PERIC0_IPCLK_9 29 > > #define CLK_GOUT_PERIC0_IPCLK_10 30 > > -#define CLK_GOUT_PERIC0_IPCLK_11 30 > > -#define CLK_GOUT_PERIC0_PCLK_0 31 > > -#define CLK_GOUT_PERIC0_PCLK_1 32 > > -#define CLK_GOUT_PERIC0_PCLK_2 33 > > -#define CLK_GOUT_PERIC0_PCLK_3 34 > > -#define CLK_GOUT_PERIC0_PCLK_4 35 > > -#define CLK_GOUT_PERIC0_PCLK_5 36 > > -#define CLK_GOUT_PERIC0_PCLK_6 37 > > -#define CLK_GOUT_PERIC0_PCLK_7 38 > > -#define CLK_GOUT_PERIC0_PCLK_8 39 > > -#define CLK_GOUT_PERIC0_PCLK_9 40 > > -#define CLK_GOUT_PERIC0_PCLK_10 41 > > -#define CLK_GOUT_PERIC0_PCLK_11 42 > > +#define CLK_GOUT_PERIC0_IPCLK_11 31 > > +#define CLK_GOUT_PERIC0_PCLK_0 32 > > +#define CLK_GOUT_PERIC0_PCLK_1 33 > > Is this a fix for current cycle? If yes, it's ok, otherwise all other IDs > should not be changed, because it's part of ABI. What is the current cycle? 5.19-rc or 5.20? I prefer this goes on 5.19-rc but if it's not possible due to the ABI breakage, I'm okay this can be going to v5.20. Best Regards, Chanho Park
On 28/06/2022 04:15, Chanho Park wrote: >> Subject: Re: [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock >> numbering of peric0/c1 >> >> On 27/06/2022 02:52, Chanho Park wrote: >>> There are duplicated definitions of peric0 and peric1 cmu blocks. >>> Thus, they should be defined correctly as numerical order. >>> >>> Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding >>> definitions for Exynos Auto v9") >>> Signed-off-by: Chanho Park <chanho61.park@samsung.com> >>> --- >>> .../dt-bindings/clock/samsung,exynosautov9.h | 56 >>> +++++++++---------- >>> 1 file changed, 28 insertions(+), 28 deletions(-) >>> >>> diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h >>> b/include/dt-bindings/clock/samsung,exynosautov9.h >>> index ea9f91b4eb1a..a7db6516593f 100644 >>> --- a/include/dt-bindings/clock/samsung,exynosautov9.h >>> +++ b/include/dt-bindings/clock/samsung,exynosautov9.h >>> @@ -226,21 +226,21 @@ >>> #define CLK_GOUT_PERIC0_IPCLK_8 28 >>> #define CLK_GOUT_PERIC0_IPCLK_9 29 >>> #define CLK_GOUT_PERIC0_IPCLK_10 30 >>> -#define CLK_GOUT_PERIC0_IPCLK_11 30 >>> -#define CLK_GOUT_PERIC0_PCLK_0 31 >>> -#define CLK_GOUT_PERIC0_PCLK_1 32 >>> -#define CLK_GOUT_PERIC0_PCLK_2 33 >>> -#define CLK_GOUT_PERIC0_PCLK_3 34 >>> -#define CLK_GOUT_PERIC0_PCLK_4 35 >>> -#define CLK_GOUT_PERIC0_PCLK_5 36 >>> -#define CLK_GOUT_PERIC0_PCLK_6 37 >>> -#define CLK_GOUT_PERIC0_PCLK_7 38 >>> -#define CLK_GOUT_PERIC0_PCLK_8 39 >>> -#define CLK_GOUT_PERIC0_PCLK_9 40 >>> -#define CLK_GOUT_PERIC0_PCLK_10 41 >>> -#define CLK_GOUT_PERIC0_PCLK_11 42 >>> +#define CLK_GOUT_PERIC0_IPCLK_11 31 >>> +#define CLK_GOUT_PERIC0_PCLK_0 32 >>> +#define CLK_GOUT_PERIC0_PCLK_1 33 >> >> Is this a fix for current cycle? If yes, it's ok, otherwise all other IDs >> should not be changed, because it's part of ABI. > > What is the current cycle? 5.19-rc or 5.20? > I prefer this goes on 5.19-rc but if it's not possible due to the ABI breakage, I'm okay this can be going to v5.20. The change was introduced indeed in v5.19-rc1, so this should go to current cycle as well (v5.19) and your patch is fine. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Sylwester or Stephen, Please kindly grab it for fixes. Best regards, Krzysztof
> Subject: Re: [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock > numbering of peric0/c1 > > On 28/06/2022 04:15, Chanho Park wrote: > >> Subject: Re: [PATCH 1/3] dt-bindings: clock: exynosautov9: correct > >> clock numbering of peric0/c1 > >> > >> On 27/06/2022 02:52, Chanho Park wrote: > >>> There are duplicated definitions of peric0 and peric1 cmu blocks. > >>> Thus, they should be defined correctly as numerical order. > >>> > >>> Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding > >>> definitions for Exynos Auto v9") > >>> Signed-off-by: Chanho Park <chanho61.park@samsung.com> > >>> --- > >>> .../dt-bindings/clock/samsung,exynosautov9.h | 56 > >>> +++++++++---------- > >>> 1 file changed, 28 insertions(+), 28 deletions(-) > >>> > >>> diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h > >>> b/include/dt-bindings/clock/samsung,exynosautov9.h > >>> index ea9f91b4eb1a..a7db6516593f 100644 > >>> --- a/include/dt-bindings/clock/samsung,exynosautov9.h > >>> +++ b/include/dt-bindings/clock/samsung,exynosautov9.h > >>> @@ -226,21 +226,21 @@ > >>> #define CLK_GOUT_PERIC0_IPCLK_8 28 > >>> #define CLK_GOUT_PERIC0_IPCLK_9 29 > >>> #define CLK_GOUT_PERIC0_IPCLK_10 30 > >>> -#define CLK_GOUT_PERIC0_IPCLK_11 30 > >>> -#define CLK_GOUT_PERIC0_PCLK_0 31 > >>> -#define CLK_GOUT_PERIC0_PCLK_1 32 > >>> -#define CLK_GOUT_PERIC0_PCLK_2 33 > >>> -#define CLK_GOUT_PERIC0_PCLK_3 34 > >>> -#define CLK_GOUT_PERIC0_PCLK_4 35 > >>> -#define CLK_GOUT_PERIC0_PCLK_5 36 > >>> -#define CLK_GOUT_PERIC0_PCLK_6 37 > >>> -#define CLK_GOUT_PERIC0_PCLK_7 38 > >>> -#define CLK_GOUT_PERIC0_PCLK_8 39 > >>> -#define CLK_GOUT_PERIC0_PCLK_9 40 > >>> -#define CLK_GOUT_PERIC0_PCLK_10 41 > >>> -#define CLK_GOUT_PERIC0_PCLK_11 42 > >>> +#define CLK_GOUT_PERIC0_IPCLK_11 31 > >>> +#define CLK_GOUT_PERIC0_PCLK_0 32 > >>> +#define CLK_GOUT_PERIC0_PCLK_1 33 > >> > >> Is this a fix for current cycle? If yes, it's ok, otherwise all other > >> IDs should not be changed, because it's part of ABI. > > > > What is the current cycle? 5.19-rc or 5.20? > > I prefer this goes on 5.19-rc but if it's not possible due to the ABI > breakage, I'm okay this can be going to v5.20. > > The change was introduced indeed in v5.19-rc1, so this should go to > current cycle as well (v5.19) and your patch is fine. > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Sylwester or Stephen, > > Please kindly grab it for fixes. Hi Sylwester or Stephen, Gently ping to not miss this in v5.19 rc cycle. Below patch as well. https://lore.kernel.org/linux-clk/7415fba0-ac04-e764-aa46-2c63b8568ac3@gmail.com/ Thanks. Best Regards, Chanho Park
diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h b/include/dt-bindings/clock/samsung,exynosautov9.h index ea9f91b4eb1a..a7db6516593f 100644 --- a/include/dt-bindings/clock/samsung,exynosautov9.h +++ b/include/dt-bindings/clock/samsung,exynosautov9.h @@ -226,21 +226,21 @@ #define CLK_GOUT_PERIC0_IPCLK_8 28 #define CLK_GOUT_PERIC0_IPCLK_9 29 #define CLK_GOUT_PERIC0_IPCLK_10 30 -#define CLK_GOUT_PERIC0_IPCLK_11 30 -#define CLK_GOUT_PERIC0_PCLK_0 31 -#define CLK_GOUT_PERIC0_PCLK_1 32 -#define CLK_GOUT_PERIC0_PCLK_2 33 -#define CLK_GOUT_PERIC0_PCLK_3 34 -#define CLK_GOUT_PERIC0_PCLK_4 35 -#define CLK_GOUT_PERIC0_PCLK_5 36 -#define CLK_GOUT_PERIC0_PCLK_6 37 -#define CLK_GOUT_PERIC0_PCLK_7 38 -#define CLK_GOUT_PERIC0_PCLK_8 39 -#define CLK_GOUT_PERIC0_PCLK_9 40 -#define CLK_GOUT_PERIC0_PCLK_10 41 -#define CLK_GOUT_PERIC0_PCLK_11 42 +#define CLK_GOUT_PERIC0_IPCLK_11 31 +#define CLK_GOUT_PERIC0_PCLK_0 32 +#define CLK_GOUT_PERIC0_PCLK_1 33 +#define CLK_GOUT_PERIC0_PCLK_2 34 +#define CLK_GOUT_PERIC0_PCLK_3 35 +#define CLK_GOUT_PERIC0_PCLK_4 36 +#define CLK_GOUT_PERIC0_PCLK_5 37 +#define CLK_GOUT_PERIC0_PCLK_6 38 +#define CLK_GOUT_PERIC0_PCLK_7 39 +#define CLK_GOUT_PERIC0_PCLK_8 40 +#define CLK_GOUT_PERIC0_PCLK_9 41 +#define CLK_GOUT_PERIC0_PCLK_10 42 +#define CLK_GOUT_PERIC0_PCLK_11 43 -#define PERIC0_NR_CLK 43 +#define PERIC0_NR_CLK 44 /* CMU_PERIC1 */ #define CLK_MOUT_PERIC1_BUS_USER 1 @@ -272,21 +272,21 @@ #define CLK_GOUT_PERIC1_IPCLK_8 28 #define CLK_GOUT_PERIC1_IPCLK_9 29 #define CLK_GOUT_PERIC1_IPCLK_10 30 -#define CLK_GOUT_PERIC1_IPCLK_11 30 -#define CLK_GOUT_PERIC1_PCLK_0 31 -#define CLK_GOUT_PERIC1_PCLK_1 32 -#define CLK_GOUT_PERIC1_PCLK_2 33 -#define CLK_GOUT_PERIC1_PCLK_3 34 -#define CLK_GOUT_PERIC1_PCLK_4 35 -#define CLK_GOUT_PERIC1_PCLK_5 36 -#define CLK_GOUT_PERIC1_PCLK_6 37 -#define CLK_GOUT_PERIC1_PCLK_7 38 -#define CLK_GOUT_PERIC1_PCLK_8 39 -#define CLK_GOUT_PERIC1_PCLK_9 40 -#define CLK_GOUT_PERIC1_PCLK_10 41 -#define CLK_GOUT_PERIC1_PCLK_11 42 +#define CLK_GOUT_PERIC1_IPCLK_11 31 +#define CLK_GOUT_PERIC1_PCLK_0 32 +#define CLK_GOUT_PERIC1_PCLK_1 33 +#define CLK_GOUT_PERIC1_PCLK_2 34 +#define CLK_GOUT_PERIC1_PCLK_3 35 +#define CLK_GOUT_PERIC1_PCLK_4 36 +#define CLK_GOUT_PERIC1_PCLK_5 37 +#define CLK_GOUT_PERIC1_PCLK_6 38 +#define CLK_GOUT_PERIC1_PCLK_7 39 +#define CLK_GOUT_PERIC1_PCLK_8 40 +#define CLK_GOUT_PERIC1_PCLK_9 41 +#define CLK_GOUT_PERIC1_PCLK_10 42 +#define CLK_GOUT_PERIC1_PCLK_11 43 -#define PERIC1_NR_CLK 43 +#define PERIC1_NR_CLK 44 /* CMU_PERIS */ #define CLK_MOUT_PERIS_BUS_USER 1
There are duplicated definitions of peric0 and peric1 cmu blocks. Thus, they should be defined correctly as numerical order. Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9") Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- .../dt-bindings/clock/samsung,exynosautov9.h | 56 +++++++++---------- 1 file changed, 28 insertions(+), 28 deletions(-)