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AJvYcCVKVCibO9Pg12eZ1spqTa5kZiSXm2UTTf/MifjcT9zLpmqsk7699CuPYivy6Rugko3MuraktdSuuo+VEU9/dGSyAt1wmOGI9IU7KemyP07Yatk= X-Gm-Message-State: AOJu0Yyt5irMlR8q50T8Dp+xq94WaUjN3sP7wN6Vt4azvgSxxKYiwOxy XAofuisFoMiqJKQo7xwfwtEnAhhYb9d8T5WzRAJXObAZ+wwKbQBLN7mj5axG76Y= X-Google-Smtp-Source: AGHT+IEMnaWns3sPAMJ91nDBk0kRT98vdLD6EXIhsFu+f4lEueXgTLnJxBfN0OJHTHTi8CWqnrfg8Q== X-Received: by 2002:a05:600c:1f84:b0:415:6cd7:9967 with SMTP id je4-20020a05600c1f8400b004156cd79967mr4750373wmb.10.1712233641601; Thu, 04 Apr 2024 05:27:21 -0700 (PDT) Received: from gpeter-l.roam.corp.google.com ([148.252.128.204]) by smtp.gmail.com with ESMTPSA id bu14-20020a056000078e00b003434b41c83fsm12106303wrb.81.2024.04.04.05.27.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Apr 2024 05:27:20 -0700 (PDT) From: Peter Griffin To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, kishon@kernel.org, alim.akhtar@samsung.com, avri.altman@wdc.com, bvanassche@acm.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, jejb@linux.ibm.com, martin.petersen@oracle.com, chanho61.park@samsung.com, ebiggers@kernel.org Cc: linux-scsi@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tudor.ambarus@linaro.org, andre.draszik@linaro.org, saravanak@google.com, willmcvicker@google.com, Peter Griffin Subject: [PATCH 12/17] scsi: ufs: host: ufs-exynos: Add EXYNOS_UFS_OPT_UFSPR_SECURE option Date: Thu, 4 Apr 2024 13:25:54 +0100 Message-ID: <20240404122559.898930-13-peter.griffin@linaro.org> X-Mailer: git-send-email 2.44.0.478.gd926399ef9-goog In-Reply-To: <20240404122559.898930-1-peter.griffin@linaro.org> References: <20240404122559.898930-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This option is intended to be set on platforms whose ufspr registers are only accessible via smc call (such as gs101). Signed-off-by: Peter Griffin Acked-by: Krzysztof Kozlowski Tested-by: Will McVicker --- drivers/ufs/host/ufs-exynos.c | 4 +++- drivers/ufs/host/ufs-exynos.h | 1 + 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c index 734d40f99e31..7b68229f6264 100644 --- a/drivers/ufs/host/ufs-exynos.c +++ b/drivers/ufs/host/ufs-exynos.c @@ -1186,7 +1186,9 @@ static int exynos_ufs_init(struct ufs_hba *hba) if (ret) goto out; exynos_ufs_specify_phy_time_attr(ufs); - exynos_ufs_config_smu(ufs); + + if (!(ufs->opts & EXYNOS_UFS_OPT_UFSPR_SECURE)) + exynos_ufs_config_smu(ufs); return 0; out: diff --git a/drivers/ufs/host/ufs-exynos.h b/drivers/ufs/host/ufs-exynos.h index a4bd6646d7f1..0fc21b6bbfcd 100644 --- a/drivers/ufs/host/ufs-exynos.h +++ b/drivers/ufs/host/ufs-exynos.h @@ -221,6 +221,7 @@ struct exynos_ufs { #define EXYNOS_UFS_OPT_BROKEN_RX_SEL_IDX BIT(3) #define EXYNOS_UFS_OPT_USE_SW_HIBERN8_TIMER BIT(4) #define EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR BIT(5) +#define EXYNOS_UFS_OPT_UFSPR_SECURE BIT(6) }; #define for_each_ufs_rx_lane(ufs, i) \