Message ID | 20240429-samsung-pinctrl-busclock-dts-v1-3-5e935179f3ca@linaro.org (mailing list archive) |
---|---|
State | Accepted |
Commit | 8120dc4656aedf86c24e1b5776f84fdd9f8ece80 |
Headers | show |
Series | hook up pin controller clocks on Google Tensor gs101 | expand |
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 8d4216cbab2e..f8fcbbb06e7b 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1327,6 +1327,8 @@ cmu_hsi2: clock-controller@14400000 { pinctrl_hsi2: pinctrl@14440000 { compatible = "google,gs101-pinctrl"; reg = <0x14440000 0x00001000>; + clocks = <&cmu_hsi2 CLK_GOUT_HSI2_GPIO_HSI2_PCLK>; + clock-names = "pclk"; interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>; };
This bus clock is needed for pinctrl register access to work. Add it. Signed-off-by: André Draszik <andre.draszik@linaro.org> --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++ 1 file changed, 2 insertions(+)