| Message ID | 20241220-acpm-v4-upstream-mbox-v6-2-a6942806e52a@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | mailbox: add Samsung Exynos driver | expand |
On Fri, Dec 20, 2024 at 01:49:57PM +0000, Tudor Ambarus wrote: > Add bindings for the Samsung Exynos Mailbox Controller. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> > --- > .../bindings/mailbox/google,gs101-mbox.yaml | 70 ++++++++++++++++++++++ > include/dt-bindings/mailbox/google,gs101.h | 14 +++++ Drop the header, not used. > 2 files changed, 84 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml > new file mode 100644 > index 000000000000..a1fbc3b2b9de > --- /dev/null > +++ b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml > @@ -0,0 +1,70 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright 2024 Linaro Ltd. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mailbox/google,gs101-mbox.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Samsung Exynos Mailbox Controller > + > +maintainers: > + - Tudor Ambarus <tudor.ambarus@linaro.org> > + > +description: | Drop | > + The Samsung Exynos mailbox controller, used on Google GS101 SoC, has 16 flag > + bits for hardware interrupt generation and a shared register for passing > + mailbox messages. When the controller is used by the ACPM protocol the shared > + register is ignored and the mailbox controller acts as a doorbell. > + The controller just raises the interrupt to the firmware after the > + ACPM protocol has written the message to SRAM. > + > +properties: > + compatible: > + const: google,gs101-mbox > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + items: > + - const: pclk > + > + interrupts: > + description: IRQ line for the RX mailbox. > + maxItems: 1 > + > + '#mbox-cells': > + const: 0 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + - '#mbox-cells' > + > +additionalProperties: false > + > +examples: > + # Doorbell mode. Drop comment, not applicable now, I think. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml new file mode 100644 index 000000000000..a1fbc3b2b9de --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2024 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/google,gs101-mbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos Mailbox Controller + +maintainers: + - Tudor Ambarus <tudor.ambarus@linaro.org> + +description: | + The Samsung Exynos mailbox controller, used on Google GS101 SoC, has 16 flag + bits for hardware interrupt generation and a shared register for passing + mailbox messages. When the controller is used by the ACPM protocol the shared + register is ignored and the mailbox controller acts as a doorbell. + The controller just raises the interrupt to the firmware after the + ACPM protocol has written the message to SRAM. + +properties: + compatible: + const: google,gs101-mbox + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: pclk + + interrupts: + description: IRQ line for the RX mailbox. + maxItems: 1 + + '#mbox-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + # Doorbell mode. + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/google,gs101.h> + + soc { + #address-cells = <1>; + #size-cells = <1>; + + ap2apm_mailbox: mailbox@17610000 { + compatible = "google,gs101-mbox"; + reg = <0x17610000 0x1000>; + clocks = <&cmu_apm CLK_GOUT_APM_MAILBOX_APM_AP_PCLK>; + clock-names = "pclk"; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH 0>; + #mbox-cells = <0>; + }; + }; diff --git a/include/dt-bindings/mailbox/google,gs101.h b/include/dt-bindings/mailbox/google,gs101.h new file mode 100644 index 000000000000..7ff4fe669f9e --- /dev/null +++ b/include/dt-bindings/mailbox/google,gs101.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright 2024 Linaro Ltd. + * + * This header provides constants for the defined mailbox channel types. + */ + +#ifndef _DT_BINDINGS_MAILBOX_GOOGLE_GS101_H +#define _DT_BINDINGS_MAILBOX_GOOGLE_GS101_H + +#define DOORBELL 0 +#define DATA 1 + +#endif /* _DT_BINDINGS_MAILBOX_GOOGLE_GS101_H */
Add bindings for the Samsung Exynos Mailbox Controller. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- .../bindings/mailbox/google,gs101-mbox.yaml | 70 ++++++++++++++++++++++ include/dt-bindings/mailbox/google,gs101.h | 14 +++++ 2 files changed, 84 insertions(+)