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Wed, 23 Aug 2023 16:47:57 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::5111:16e8:5afe:1da1]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::5111:16e8:5afe:1da1%6]) with mapi id 15.20.6699.020; Wed, 23 Aug 2023 16:47:57 +0000 From: Jason Gunthorpe To: Andy Gross , Alim Akhtar , Bjorn Andersson , AngeloGioacchino Del Regno , Baolin Wang , Christophe Leroy , Gerald Schaefer , Heiko Stuebner , iommu@lists.linux.dev, Jernej Skrabec , Jonathan Hunter , Joerg Roedel , Kevin Tian , Konrad Dybcio , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-s390@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-tegra@vger.kernel.org, Russell King , linuxppc-dev@lists.ozlabs.org, Matthias Brugger , Matthew Rosato , Michael Ellerman , Nicholas Piggin , Orson Zhai , Rob Clark , Robin Murphy , Samuel Holland , Thierry Reding , Krishna Reddy , Chen-Yu Tsai , Will Deacon , Yong Wu , Chunyan Zhang Cc: Lu Baolu , Dmitry Osipenko , Marek Szyprowski , Nicolin Chen , Niklas Schnelle , Steven Price , Thierry Reding Subject: [PATCH v7 22/24] iommu: Add ops->domain_alloc_paging() Date: Wed, 23 Aug 2023 13:47:36 -0300 Message-ID: <22-v7-de04a3217c48+15055-iommu_all_defdom_jgg@nvidia.com> In-Reply-To: <0-v7-de04a3217c48+15055-iommu_all_defdom_jgg@nvidia.com> References: X-ClientProxiedBy: CH2PR20CA0011.namprd20.prod.outlook.com (2603:10b6:610:58::21) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|CY5PR12MB6346:EE_ X-MS-Office365-Filtering-Correlation-Id: d0199f27-3796-48fe-60d5-08dba3f8ad70 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: hxbPuIG6dwTAS5188ooE+jzPvJncFDYZ8wV4ad2mMosC060ophRA3E8rEMnVm1ofTwJ9KExRZO74pudW1XuaPFRQJ8sazsULINTtX0w+Tfp7Y0gPmN1f/XxzH7TchZw/FqueDum2DAhaNSDN4WhdR5m5BDVA1fvenKvfDbbdM8nAX8HSDNRDHeWjfTYjwiTZQbgtU7P0RSBI6S3q8363YohDM8qGBt5Gh5dQT63NaJUTtpPxSYoX7Isr4EjTKurTaujD9MTkj2fWB502Ko6qULG08mwk+7N37alNkLkfvEzRsyvLVPIpHfoWBcusWfF/d1XCb0zRaQjBDZNsJDE+BWPTfRsXVjA1x9ozaDxjnxuIdl7bp85WRfG4PqRj32LOD2exBmRe+W2SYpsyI3/vpJkZZFslvWDNNtS6P1W+mdx5zb2H8ZGnXz6gC/E1Fj5xtTZq1AgFYReErTjZAkPa/avdOdTO4IlVX94GI2kP1wroNciIP6LmTauuKqeN4MKYukzGqTZUjPgWsqN1dQ9Ex3igTbpcpOKUV45vv7C6WE5Yq2Zp7QFpVeW7BEttYvrELUzSyjJI/GOf4ga1RHAbClDN9UBsl+r45VxLGB9JSOnZEmZqBbk4qAE5pAg7l2F5dBWisZklMcPXFE1UHXLZ00uVkN86GZhxnbV86+2cpiglbJDeOltaGe35ccPhAcEm5qTWHEqDJe7w7kwXOrfU7AjKB2V4V1RLtt3pf00TX4RrRggaZeKS0HvMcGJdLd9H7MQgc7DPIlpQY1TFzRCJybCbR6PWDr+4/thDMcHBYmbJ2V+09bSlao4crxs7jG8tyggjVoM1oBtc20VoMGJrTr2sqlsi41KDEqtICMHKtO1sjoyhHUIme/hZtNU7A6OJhLVuTZXNpFo1MjtEbNJairpBLj8xfAV0WBC4Iy3mmLZNp8QcGg4hfrGh7rU8+nlwcles1HwhfYlZwdar/Cz6B0clws+QmbPKJjYVJfjb3cpRaxMAGwiK59r3mhPhGe/JQwAXiEMpWefBWn5L/du/QchtZt4yBERgHUF7wTMYLKbrSxvv6fRpg/Ja2zBBynZxS34Gv3gfVhtgObWM3t+VSDffdQz7KTcnGejXQEriHBUTwGRAYeTVw0jupcs4fYATYBcZ23oOUtn1VLyxVjMs/rqbtJsJs/ZW/KZlf7e7pTotk/F9YxB0JmcZmwyxsvhlRleWaERdg5dcF9EfAr7svNXNk8QFtNSosice4L4N4MP7QnOpLAOPAxj231lk/8m/ekKnrw/lPFnGtOeJRgKtU+DXAI8qFbXwCNN9WSfX/2+sZUtxsUJyrPy581MmU1FZmqvv2qjcQccsE0thJkFHmwV43RFlTDnVjgR2ZjBE9f+1PFpwV3bP324BDmdZT3dE6cDGCqo2Qniy/ANAPp+X0RNaVg9I6z39b0C1RsX/1UoAPb3ofh5ep6USNdRiI8x5vIh2j74zlIUZ0+nlb30ORnxXclae8NQqmYKU8s3m5JAMc0HpIergtrA4fya/3TwcgBjNIIbt1YdFRb+PquW0HnmIoDK9aycqoCf7tUEIvtZptu9HikLyuCZSao7odggV X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: d0199f27-3796-48fe-60d5-08dba3f8ad70 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Aug 2023 16:47:46.3321 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: SJ0W6LNzTULVV+lVMTHJ4vuat4dojvEQd1ynfBOiQ3VoaYEy3RGKoBSRz/IKDQGq X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6346 Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This callback requests the driver to create only a __IOMMU_DOMAIN_PAGING domain, so it saves a few lines in a lot of drivers needlessly checking the type. More critically, this allows us to sweep out all the IOMMU_DOMAIN_UNMANAGED and IOMMU_DOMAIN_DMA checks from a lot of the drivers, simplifying what is going on in the code and ultimately removing the now-unused special cases in drivers where they did not support IOMMU_DOMAIN_DMA. domain_alloc_paging() should return a struct iommu_domain that is functionally compatible with ARM_DMA_USE_IOMMU, dma-iommu.c and iommufd. Be forwards looking and pass in a 'struct device *' argument. We can provide this when allocating the default_domain. No drivers will look at this. Tested-by: Steven Price Tested-by: Marek Szyprowski Tested-by: Nicolin Chen Reviewed-by: Lu Baolu Signed-off-by: Jason Gunthorpe Reviewed-by: Jerry Snitselaar --- drivers/iommu/iommu.c | 17 ++++++++++++++--- include/linux/iommu.h | 3 +++ 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 568dec45a06954..c5d8cf48a99332 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2041,6 +2041,7 @@ void iommu_set_fault_handler(struct iommu_domain *domain, EXPORT_SYMBOL_GPL(iommu_set_fault_handler); static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, + struct device *dev, unsigned int type) { struct iommu_domain *domain; @@ -2048,8 +2049,13 @@ static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, if (alloc_type == IOMMU_DOMAIN_IDENTITY && ops->identity_domain) return ops->identity_domain; + else if (type & __IOMMU_DOMAIN_PAGING && ops->domain_alloc_paging) + domain = ops->domain_alloc_paging(dev); + else if (ops->domain_alloc) + domain = ops->domain_alloc(alloc_type); + else + return NULL; - domain = ops->domain_alloc(alloc_type); if (!domain) return NULL; @@ -2074,14 +2080,19 @@ static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, static struct iommu_domain * __iommu_group_domain_alloc(struct iommu_group *group, unsigned int type) { - return __iommu_domain_alloc(group_iommu_ops(group), type); + struct device *dev = + list_first_entry(&group->devices, struct group_device, list) + ->dev; + + return __iommu_domain_alloc(group_iommu_ops(group), dev, type); } struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus) { if (bus == NULL || bus->iommu_ops == NULL) return NULL; - return __iommu_domain_alloc(bus->iommu_ops, IOMMU_DOMAIN_UNMANAGED); + return __iommu_domain_alloc(bus->iommu_ops, NULL, + IOMMU_DOMAIN_UNMANAGED); } EXPORT_SYMBOL_GPL(iommu_domain_alloc); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index c3d2e79076ffab..319bdc8328b407 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -239,6 +239,8 @@ struct iommu_iotlb_gather { * use. The information type is one of enum iommu_hw_info_type defined * in include/uapi/linux/iommufd.h. * @domain_alloc: allocate iommu domain + * @domain_alloc_paging: Allocate an iommu_domain that can be used for + * UNMANAGED, DMA, and DMA_FQ domain types. * @probe_device: Add device to iommu driver handling * @release_device: Remove device from iommu driver handling * @probe_finalize: Do final setup work after the device is added to an IOMMU @@ -271,6 +273,7 @@ struct iommu_ops { /* Domain allocation and freeing by the iommu driver */ struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type); + struct iommu_domain *(*domain_alloc_paging)(struct device *dev); struct iommu_device *(*probe_device)(struct device *dev); void (*release_device)(struct device *dev);