From patchwork Mon Sep 25 09:46:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huacai Chen X-Patchwork-Id: 9969591 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 47493602D8 for ; Mon, 25 Sep 2017 10:15:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 374CA28ACD for ; Mon, 25 Sep 2017 10:15:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2C03A28ACF; Mon, 25 Sep 2017 10:15:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 576B628ACD for ; Mon, 25 Sep 2017 10:15:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934550AbdIYKPs (ORCPT ); Mon, 25 Sep 2017 06:15:48 -0400 Received: from smtpbgsg2.qq.com ([54.254.200.128]:35065 "EHLO smtpbgsg2.qq.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933814AbdIYKPr (ORCPT ); Mon, 25 Sep 2017 06:15:47 -0400 X-QQ-mid: bizesmtp16t1506332683tnrog85k Received: from software.domain.org (unknown [222.92.8.142]) by esmtp4.qq.com (ESMTP) with id ; Mon, 25 Sep 2017 17:44:39 +0800 (CST) X-QQ-SSF: 01100000008000F0FNF0000A0000000 X-QQ-FEAT: JtFveLzs4P/+QpMqk2SsD1M7S2fIck/xJjMV47goGv/xn7L7wvKzqVk0Ftmm9 M1SheQM74Xd0BN4TD5KIy82AduMI8ks9OqHVqlRFdfyEpWwtxWCe9j5iap4OT3W05jfxsNQ lB3az0SfT0VJAQJAIXD3h1MR/MwDDWbPM2ZLof+0A21Jhqp7xWPeBj7pFdpyljOniAoSY6k jwXneE+VXdAEq6Sx2gWa7QKQOB/0SPYA/BhKE0e/obnE1xNlyTdV/EewqWwYIup/Zx7tqQF GvVYQiEFfqDyPRRLws29gXKnnI8FMierX7bniP0OQNW3zqBl4Zueqf3dM= X-QQ-GoodBg: 0 From: Huacai Chen To: Christoph Hellwig Cc: Marek Szyprowski , Robin Murphy , Andrew Morton , Fuxin Zhang , linux-kernel@vger.kernel.org, Ralf Baechle , James Hogan , linux-mips@linux-mips.org, "James E . J . Bottomley" , "Martin K . Petersen" , linux-scsi@vger.kernel.org, Roland Dreier , Pawel Osciak , Kyungmin Park , Michael Chan , Benjamin Herrenschmidt , Ivan Mikhaylov , Tariq Toukan , Andy Gross , "Mark A . Greer" , Robert Baldyga , Huacai Chen , stable@vger.kernel.org Subject: [PATCH V7 2/2] scsi: Align block queue to dma_get_cache_alignment() Date: Mon, 25 Sep 2017 17:46:06 +0800 Message-Id: <1506332766-23966-2-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1506332766-23966-1-git-send-email-chenhc@lemote.com> References: <1506332766-23966-1-git-send-email-chenhc@lemote.com> X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:lemote.com:qybgforeign:qybgforeign4 X-QQ-Bgrelay: 1 Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so scsi's block queue should be aligned to ARCH_DMA_MINALIGN. Otherwise, it will cause data corruption, at least on MIPS: Step 1, dma_map_single Step 2, cache_invalidate (no writeback) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen --- drivers/scsi/scsi_lib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 9cf6a80..19abc2e 100644 --- a/drivers/scsi/scsi_lib.c +++ b/drivers/scsi/scsi_lib.c @@ -2132,11 +2132,11 @@ void __scsi_init_queue(struct Scsi_Host *shost, struct request_queue *q) q->limits.cluster = 0; /* - * set a reasonable default alignment on word boundaries: the - * host and device may alter it using + * set a reasonable default alignment on word/cacheline boundaries: + * the host and device may alter it using * blk_queue_update_dma_alignment() later. */ - blk_queue_dma_alignment(q, 0x03); + blk_queue_dma_alignment(q, max(4, dma_get_cache_alignment(dev)) - 1); } EXPORT_SYMBOL_GPL(__scsi_init_queue);