From patchwork Fri Feb 15 07:40:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suganath Prabu S X-Patchwork-Id: 10814275 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2023717E0 for ; Fri, 15 Feb 2019 07:41:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EBCED2EB32 for ; Fri, 15 Feb 2019 07:41:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EA4202EB88; Fri, 15 Feb 2019 07:41:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5AD7A2EB8C for ; Fri, 15 Feb 2019 07:41:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390238AbfBOHlF (ORCPT ); Fri, 15 Feb 2019 02:41:05 -0500 Received: from mail-yb1-f193.google.com ([209.85.219.193]:32860 "EHLO mail-yb1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728823AbfBOHlE (ORCPT ); Fri, 15 Feb 2019 02:41:04 -0500 Received: by mail-yb1-f193.google.com with SMTP id w2so3466534ybi.0 for ; Thu, 14 Feb 2019 23:41:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dy+e6oQ7CSinT9QlwhS+fuQA9alIwcaS7YY0JzYje+Q=; b=R8YI4zoHBv/2nTe+2CmxMExoEhLx3owA2FSfVEGBZpIEKpNwQj1ydy6JfAzQ5I5FMP 5K6sCCv/3lotvak4IPMXeOci5qdmAhXImSataQjwyCBFYSLYO5FZnwWgLp8kUzCUlkRf M6YzuZdeiEjS9kaSS1s3VtMKCGqjyzSjjYxGg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dy+e6oQ7CSinT9QlwhS+fuQA9alIwcaS7YY0JzYje+Q=; b=IkXDFBIUIZkXavxw5xlpo8FseoJiuj9oUvF0v6OuuSHmYXgNtEU+Jru1tU8qkMkGKq 8xELAYly2MLbfBqWtQzgZ7pKaGKKyZG8RpQXF0OhIDuMuzUMC7hWFhplpAqImcY/iVBp vw4uEFqBn5VxR8+92z5ZkcUkTvgcKfV48fmwArRiDPVvqbhqOhFZoK8gccTN57IK65l4 JzNr2OxNNzRxsb10aO5ZApIKEqiPH3d2v9/x3jwyS1zKnKQSxLb+hmk/TV2bxIKAdWaU RTzUGYPMq7vgSqgzU2HyZObydyHXLvjQllrAfS21uJIk2PEIUE+kbtCTRKJdVvI6X70f SoLw== X-Gm-Message-State: AHQUAuY8SO0xmVepTgXdy4g52WU2RVjnMNKicgPydSC88OGoOn/dGop+ pJEccmjzmFdmhXPQXuzXFdx9mSYurqSuR2NxjrxfTly4UIua27VU7/MtFV6YGhtd0YonIw+zls2 T4lWA74Pw4A9q/zpT8m8shzdgpEgaZOh6oHLTE9M3crx0J+HSd9+xHwBA1ly/YwKR1t6TWyyNH3 7BLVzSGlp0wMS8lENwKkeI X-Google-Smtp-Source: AHgI3Ia+uCnVII8PJE4zKwk5dCSZgYe+CHixRtpRSN2adu4353UA/tpiqX84q4PkLDnNnT55/IqsJQ== X-Received: by 2002:a5b:501:: with SMTP id o1mr6684091ybp.85.1550216463833; Thu, 14 Feb 2019 23:41:03 -0800 (PST) Received: from dhcp-10-123-20-72.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id c124sm1696388ywe.12.2019.02.14.23.41.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Feb 2019 23:41:03 -0800 (PST) From: Suganath Prabu To: linux-scsi@vger.kernel.org Cc: Sathya.Prakash@broadcom.com, sreekanth.reddy@broadcom.com, Suganath Prabu Subject: [v1 5/7] mpt3sas: Load balance to improve performance and avoid soft lockups. Date: Fri, 15 Feb 2019 02:40:28 -0500 Message-Id: <1550216430-36612-6-git-send-email-suganath-prabu.subramani@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1550216430-36612-1-git-send-email-suganath-prabu.subramani@broadcom.com> References: <1550216430-36612-1-git-send-email-suganath-prabu.subramani@broadcom.com> Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Driver uses "reply descriptor post queues" in round robin fashion so that IO's are distributed to all the available reply descriptor post queues equally. With this each reply descriptor post queue load is balanced. This is enabled only if CPUs count to MSI-X vector count ratio is X:1 (where X > 1) This improves performance and also fixes soft lockups. Signed-off-by: Suganath Prabu --- drivers/scsi/mpt3sas/mpt3sas_base.c | 21 +++++++++++++++++++++ drivers/scsi/mpt3sas/mpt3sas_base.h | 5 +++++ 2 files changed, 26 insertions(+) diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.c b/drivers/scsi/mpt3sas/mpt3sas_base.c index 1f358bc..aadd9e2 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.c +++ b/drivers/scsi/mpt3sas/mpt3sas_base.c @@ -1382,6 +1382,16 @@ union reply_descriptor { } u; }; +static u32 base_mod64(u64 dividend, u32 divisor) +{ + u32 remainder; + + if (!divisor) + pr_err("mpt3sas: DIVISOR is zero, in div fn\n"); + remainder = do_div(dividend, divisor); + return remainder; +} + /** * _base_process_reply_queue - Process reply descriptors from reply * descriptor post queue. @@ -2845,6 +2855,11 @@ _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc) if (!_base_is_controller_msix_enabled(ioc)) return; + ioc->msix_load_balance = false; + if (ioc->reply_queue_count < num_online_cpus()) { + ioc->msix_load_balance = true; + return; + } memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); @@ -3248,6 +3263,12 @@ mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr) static inline u8 _base_get_msix_index(struct MPT3SAS_ADAPTER *ioc) { + /* Enables reply_queue load balancing */ + if (ioc->msix_load_balance) + return ioc->reply_queue_count ? + base_mod64(atomic64_add_return(1, + &ioc->total_io_cnt), ioc->reply_queue_count) : 0; + return ioc->cpu_msix_table[raw_smp_processor_id()]; } diff --git a/drivers/scsi/mpt3sas/mpt3sas_base.h b/drivers/scsi/mpt3sas/mpt3sas_base.h index fb572cd..3895407 100644 --- a/drivers/scsi/mpt3sas/mpt3sas_base.h +++ b/drivers/scsi/mpt3sas/mpt3sas_base.h @@ -1024,6 +1024,9 @@ typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); * @msix_vector_count: number msix vectors * @cpu_msix_table: table for mapping cpus to msix index * @cpu_msix_table_sz: table size + * @total_io_cnt: Gives total IO count, used to load balance the interrupts + * @msix_load_balance: Enables load balancing of interrupts across + * the multiple MSIXs * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands * @scsi_io_cb_idx: shost generated commands * @tm_cb_idx: task management commands @@ -1200,6 +1203,8 @@ struct MPT3SAS_ADAPTER { u32 ioc_reset_count; MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; u32 non_operational_loop; + atomic64_t total_io_cnt; + bool msix_load_balance; /* internal commands, callback index */ u8 scsi_io_cb_idx;