Message ID | 1580721472-10784-3-git-send-email-cang@codeaurora.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | UFS driver general fixes bundle 4 | expand |
> Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> > Signed-off-by: Can Guo <cang@codeaurora.org> > Reviewed-by: Hongwu Su <hongwus@codeaurora.org> Reviewed-by: Bean Huo <beanhuo@micron.com>
On Mon, 2020-02-03 at 01:17 -0800, Can Guo wrote: > From: Asutosh Das <asutoshd@codeaurora.org> > > This sequence change is required to avoid dips in voltage > during boot-up. > > Apparently, this dip is caused because in the original > sequence, the regulators are initialized in lpm mode. > And then when the load is set to high, and more current > is drawn, than is allowed in lpm, the dip is seen. > > Signed-off-by: Asutosh Das <asutoshd@codeaurora.org> > Signed-off-by: Can Guo <cang@codeaurora.org> > Reviewed-by: Hongwu Su <hongwus@codeaurora.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 10dbc0c..83ae093 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -7248,6 +7248,11 @@ static int ufshcd_config_vreg(struct device *dev, name = vreg->name; if (regulator_count_voltages(reg) > 0) { + uA_load = on ? vreg->max_uA : 0; + ret = ufshcd_config_vreg_load(dev, vreg, uA_load); + if (ret) + goto out; + if (vreg->min_uV && vreg->max_uV) { min_uV = on ? vreg->min_uV : 0; ret = regulator_set_voltage(reg, min_uV, vreg->max_uV); @@ -7258,11 +7263,6 @@ static int ufshcd_config_vreg(struct device *dev, goto out; } } - - uA_load = on ? vreg->max_uA : 0; - ret = ufshcd_config_vreg_load(dev, vreg, uA_load); - if (ret) - goto out; } out: return ret;