From patchwork Wed May 20 17:53:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Asutosh Das (asd)" X-Patchwork-Id: 11560955 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CCE4914B7 for ; Wed, 20 May 2020 17:53:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BF3EA207D4 for ; Wed, 20 May 2020 17:53:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726964AbgETRxn (ORCPT ); Wed, 20 May 2020 13:53:43 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:3932 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726729AbgETRxj (ORCPT ); Wed, 20 May 2020 13:53:39 -0400 Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-02.qualcomm.com with ESMTP; 20 May 2020 10:53:39 -0700 Received: from asutoshd-linux1.qualcomm.com ([10.46.160.39]) by ironmsg05-sd.qualcomm.com with ESMTP; 20 May 2020 10:53:38 -0700 Received: by asutoshd-linux1.qualcomm.com (Postfix, from userid 92687) id 6325420B91; Wed, 20 May 2020 10:53:38 -0700 (PDT) From: Asutosh Das To: cang@codeaurora.org, martin.petersen@oracle.com, PedroM.Sousa@synopsys.com, linux-scsi@vger.kernel.org Cc: Asutosh Das , linux-arm-msm@vger.kernel.org, Alim Akhtar , Avri Altman , "James E.J. Bottomley" , Stanley Chu , Bean Huo , Bart Van Assche , Tomas Winkler , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v4 1/2] scsi: ufs: export hibern8 entry Date: Wed, 20 May 2020 10:53:16 -0700 Message-Id: <186237103353b5a79c3496e619fca894dbc78600.1589997078.git.asutoshd@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-scsi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Qualcomm controllers need to be in hibern8 before scaling up or down the clocks. Hence, export the hibern8 entry function. Signed-off-by: Asutosh Das --- drivers/scsi/ufs/ufshcd.c | 4 ++-- drivers/scsi/ufs/ufshcd.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index c3389c9..aaf4adf 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -243,7 +243,6 @@ static int ufshcd_probe_hba(struct ufs_hba *hba, bool async); static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on, bool skip_ref_clk); static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on); -static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba); static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba); static int ufshcd_host_reset_and_restore(struct ufs_hba *hba); static void ufshcd_resume_clkscaling(struct ufs_hba *hba); @@ -3877,7 +3876,7 @@ static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba) return ret; } -static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba) +int ufshcd_uic_hibern8_enter(struct ufs_hba *hba) { int ret = 0, retries; @@ -3889,6 +3888,7 @@ static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba) out: return ret; } +EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_enter); int ufshcd_uic_hibern8_exit(struct ufs_hba *hba) { diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 88d4202..defc12c 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -835,6 +835,7 @@ int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask, void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk); void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist, u32 reg); +int ufshcd_uic_hibern8_enter(struct ufs_hba *hba); static inline void check_upiu_size(void) {